I’ve never submitted with Fab layers. SilkS layers are optional. They may require the file, but it doesn’t have to contain info. They don’t care if you don’t want to put human readable info on your board. Remember this includes the outlines of components so if you misalign components, it’s your fault. Also you will get a tiny board ID somewhere, unless you pay more for them not to put it.
During last 30 years we were not using silkscreen layer at PCBs not visible to user. For rare PCBs visible for user when we needed to add some text/drawing (terminal block wire information, or power socket polarity symbol) we did it at another layer and send it to PCB manufacturer to use as Silk.
Don’t know how now but in old times the silk layer was the least accurate at PCB so its usage for any production purposes (like element positioning) was a wrong idea. Elements positions automatically during reflow soldering (surface tension), and if the footprint is wrong they can lost their position (stand up at one end for example).
The contract manufacturer (we use since about 15 years) gets the PCB gerber files (without silk), the drill file, the paste file, the P&P file, BOM and pdf documentation containing PCB pictures with elements marked by (using KiCad nomenclature) CrtYd rectangles with references written inside those rectangles. We were never asked to give him any more information.
The fabrication layer we have never send to anyone.
I just had a board made at PCBWay, and the silkscreen contained only my own texts/designs.
I moved all the component refs and values to the Fab layer.
They want the fab and silkscreen layers in the ZIP file I believe, but fab doesn’t get used except maybe as a reference if you order assembly, and silkscreen can contain what you want (also empty).
However - if you want assembly and not just PCBs, I believe they want indicators for the polarised components (+ terminal) and multi-pin components (1-pins indicated), and I think they want those on the silkscreen. And IMHO that’s really a good idea, since it allows visual inspection of correct placement of symmetrical packages on the finished PCBs during assembly. Otherwise you might get all your boards with your expensive chip mounted 90deg off…
Could be worse. At a company that I used to work at one of the board designers forgot that PLCC chips have pin 1 in the middle of one of the sides so he designed the footprint with pin 1 at a corner. No one caught his mistake so we got some boards made with the footprint pin-outs 45° off of the chip…