Do Global labels connect to Local labels?

In the docs: https://docs.kicad.org/master/en/eeschema/eeschema.html#flat-hierarchy there’s a figure pic_sockets.sch which implies that Global labels DATA-RB7 and VPP-MCLR connect to correspondingly-named Local labels. (And CLOCK-RB6 seems to do nothing, and CLOCK-RBI i s suspect)

The rest of the docs don’t seem to mention that feature, and it would seem antithetical to the idea of keeping Local labels “local” to the one sheet. I also can’t get it to work when I test it. So I’d appreciate if someone could confirm that this is indeed an error in the docs, and that actually Local labels and Global labels do not connect to each other just by having the same name on a schematic.

[Later edit] I was wrong, all three types of label having the same name do connect to each other if they appear on the same sheet. Reading the discussion in this thread may still be useful.

I was under the impression that local labels do not connect to global labels with the same name, but to be sure made a little test case for it, and to my surprise they do get connected. (Look at the ratsnest line in Pcbnew).

@paulvdh … and I’m glad I asked, because the test of connectivity that I thought confirmed that Global and Local labels don’t connect was actually a bad test.

My test was to create a child sheet containing a digital component that has an input wired to a local label. On the same sheet there’s a Global label with the same name, and that global label also appears on the parent sheet, where it is grounded. My idea was to use DRC to find out if the connection was made from Global label to same-name local label. On revisiting this I discovered a mistake, and in fact the Global and local labels do connect!

I’ve now tested Hierarchical labels, and they appear to do the same – that is a Hierarchical label connects to a local label of the same name (on the same sheet).

I did find a problem in the DRC: A hidden pin on a child sheet (say Vcc and Gnd on a 7407) does connect (on the PCB) to a Global Vcc label on the parent sheet. However DRC behaves oddly: it thinks that the hidden 7407 power pins are satisfied, but reports an error that Vcc and Gnd Global labels on the parent sheet are connected to no other global labels.

Furthermore, the docs (https://docs.kicad.org/master/en/eeschema/eeschema.html#connections-hierarchical-pins) on invisible pins on hierarchical sheets seems incorrect: “It was seen that invisible power pins were connected together if they have the same name. Thus all the power pins declared “Invisible Power Pins” and named VCC are connected all symbol invisible power pins named VCC only within the sheet they are placed.”

There is a bit of weirdness going on in the 74xx_IEEE library.
Some symbols have hidden Vcc and Gnd, while others have VCC and GND.
These hidden power pins are treated as global labels, but labels are case sensitive. Mixing case in this way in a single library looks like a bug to me.

I’ve made a little test project, just to see what gets connected to what:

Separate sheet:
image

I also get the ERC error:

Global label Vcc is not connected to any other global label.

While a check in Pcbnew shows that pin3 of the connector has a ratsnest line to the power of both IC’s.

So it looks like two bugs to me:

  1. Mix of case in the 74xx_IEEE library.
  2. Used global label erroneous flagged as not used, when connected to another sheet.

If anyone wants to verify, here is the test project:
2021-06-04_asdf_hierarchical_labels.zip (7.2 KB)

@paulvdh Yes, I agree with all your observations.

Also, I have filed a bug report on related errors in Kicad’s documentation, here:

@paulvdh An even further quirk with same-named labels of different types connecting to each other:

Suppose you have a project with a parent sheet “parent”, and child sheets “child1” and “child2”. Now you create a hierarchical label on child1 called “FLAG”, and use a hierarchical pin on parent to connect to it. All good so far.

But later you create a different signal called “FLAG” on child2, which, with deadline approaching, turns out needs to connect to somewhere on child1. So you make it a global label (because lazy). Once you put a global label named “FLAG” on child1, that unwantedly connects the new FLAG labels to the existing FLAG hierarchical label and pin.

Of course, there are some elements of poor discipline in this example, but the point is that the connecting of same-named labels of all types is something essential to be aware of. Not only is it not mentioned in the docs, the docs actually imply that the different label type do not connect to each other by name.

I seem to recall that labels of different type should not connect to each other, even if they have the same name.

Unfortunately my mind is quite fuzzy again lately and I do not trust it much.

They can be connected together, but there’s some logic according to which the net name is decided, and it may be confusing. @craftyjon explained something here, but I can’t find any better documentation now.

I have been spending all my time on the PCB editor manual; haven’t started on the schematic…

Yes, labels of any type connect to each other on the same schematic sheet. The difference between label types is what happens between different schematic sheets.*

*and what exactly the net will be called on the PCB, but that’s not as important.

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