I’m using a hierarchical schematics and to different part of the circuit, I’m using buses. Through these buses I need to connect some USB3 lines which contain some differential pair. So I’ve made this:
The net names of the pairs need to end in a specific way to be counted as a differential pair.
I think the correct endings are + and - (I remember there were other options but i can’t find any documentation about it.)
I fear that your local label USB_D1_SSTX_P is overwritten by the second local label A1_USB3_4.
I’m not sure there is a solution that allows both the usage of buses and differential pairs.
Nope there is not. If you have two labels (with the same weight. example two local labels) one of them is chosen “randomly”. (Unspecified behavior.)
They might be chosen by: last one found, first one found, the left most, the rightmost, …
In the worst case the unspecified behavior could mean that someone with a different kicad version gets a different result!
I think i read somewhere that the buses might get implemented in a more intelligent way.
(I can’t find it at the moment. So maybe i’m wrong about that.)
But to answer your question:
Wishes for features need to be posted on the bugtracker with ‘wishlist’ as tag
Pure wishes, without support by a Dev or a patch ready to go into the KiCAD code have a very small chance of ever being implemented.
Document your wish as good as possible. The better it is documented the better the changes a develober will look at it.
The side to report bugs/wishes can be found under: https://bugs.launchpad.net/kicad
(In case you want to post there, search for 15 minutes if anyone else has already posted a similar wish. If so: mark it with “this bug affects me too” instead of creating a duplicate bug.)
I’ve finally found a way to solve my issue while keeping the buses. I’ve just added a global label to each net with the _P/_N at the end. The global label takes priority on local one so problem solve.
This solution only works if you instantiate your hierarchical sheet only once.
Maybe make a note near the labels such that you remember that. (Otherwise you might make a mistake a few years down the line.)
You can see Allegro allows arbitrary suffix selection for the positive/negative nets in the DP, and the DP gets a unique name in the Constraint Manager tool to allow both nets to be constrained relative to other elements.