Differential pair length matching with checkpoints

[pcdwarf]

Hi,

I’m encountering issues with length matching while using differential pairs.
The majority of the time, the discrepancy in length arises from the ends of the transmission line, near the components.

Ideally, the adjustment for length should be situated close to the source of the discrepancy, ensuring that the signals remain in phase for the majority of the transmission line.

But kicad seems to always treat the pair as a whole.
Is there a way to adjust the length between some sort of checkpoints where the mismatch should be near zero.

Note : I used a custom net-tie do this kind of things. The problem is that it clutters the schematic with unnecessary virtual components, and also the footprint of the net-tie has to be tuned to match the desired impedance.

[der.ule]

Do you mean something like what is depicted in the cyan pair in the following pic ?

If yes, once that your pair is finished, you can adjust the length and skew using one the following modes:

I hope this helps

[pcdwarf]

I was not referring to the lengths of the pairs but rather to the “skew,” meaning the difference in length between the two traces of the same pair.

As far as I know, the skew adjustment tool only calculates with the entire pair, rather than allowing adjustments to be made to specific parts of it. I would like to make multiple adjustments to different parts of the pair.

Here is my current workaround to solve this problem

Component
Path causing skew A
Skew A adjustment
Utilization of an unsightly net-tie
Long, nearly straight line
Utilization of another unsightly net-tie
Skew B adjustment
Path causing skew B
Component

While this approach functions, I feel uneasy about it.
I may not be utilizing the tools correctly.

Is it possible to make partial adjustments without resorting to guesswork?

[pcdwarf]

by the way, nice 3d view.
is this done with kicad ? how ?

[der.ule]

Not sure what do you mean, the skew adjustment will start from the place you click and you can interrupt it and do another adjustment somewhere else, if you right click while doing it, you can adjust amplitude and spacing (or do it with the hot keys).

As a test I just did the following:

p.s.: The photo came from internet, I believe from the documentation of another CAD Software which name rhymes with Pentium

[dsa-t]

You can cut a part of the lines in the middle, this will make the tuner calculate lengths to unconnected ends, not of the full line.

[hmk]

If I understand correctly, what is wished for here is to be able to define a “waypoint” along the differential pair and then tune the skew for the part of the differential pair from said “waypoint” to one of the ends of the differential pair, or between two “waypoints”.

As it is now only end-to-end tuning is calculated by KiCad.

[der.ule]

I just recently installed v8 and playing with it a bit more, now it is possible to move the meanders around (what I think was not possible before), thanks KiCad team!

[pcdwarf]

@hmk

If I understand correctly, what is wished for here is to be able to define a “waypoint” along the differential pair and then tune the skew for the part of the differential pair from said “waypoint” to one of the ends of the differential pair, or between two “waypoints”.

As it is now only end-to-end tuning is calculated by KiCad.

yes! this is exactly what i wish.

[dsa-t]

@dsa-t

You can cut a part of the lines in the middle, this will make the tuner calculate lengths to unconnected ends, not of the full line.

^^^^^^^^^^^^^^^^^^^^^^

[twl]

I think the OP means the ability to minimize (or at least visualize) the diff pair intra skew throughout the length of the diff pair. It not only matters to have the _P/_N lengths to be equal, but (for mode conversion/diff-common mode impedance uniformity), to have the same phase of the complementary signals along the entire length of a diff pair.

IMHO an overlay drawn on top of the diff pair being tuned and showing phase error along the length would be very useful in this case.
T.

[glenenglish]

We need something like XSIGNALS

https://www.altium.com/documentation/altium-designer/defining-high-speed-signal-paths-with-xsignals

[twl]

There’s already a way (although poorly documented) to define something alike in KiCad, it’s the fromTo design rule expression.

So in AD you would write InxSignal('DRAM_A0_PP1') whereas in KiCad - fromTo('MY_FPGA','MY_DDR') && netClass== 'DRAM_A'). I’ll publish soon a demo design using all this stuff, hopefully it’ll serve as reference for making topological constraints.

Tom