It’s a bit difficult to give good advise here because you have not given enough information about the complexity of your project. I assume it’s a fairly simple uC board with “full speed” (12Mbps) USB and a bunch of other smaller stuff. Such projects are quite often done on 2 layer PCB’s, but it’s a tradeoff. 2 layer PCB’s have lower costs, but 4 layer PCB’s are easier to route and generally also have a higher resolution (which is also a part of the cost increase) With a 4 layer board you may be able to reduce the overall size of the PCB which makes the cost difference even smaller.
Concerning track width. KiCad has the Calculator Tools in the project manager, and a 0.2mm wide (narrow) track can handle 750mA without overheating (Assuming 35um copper thickness) As a result, the current handling capability of tracks only is an issue with really high current tracks. But there are few advantages to using wider tracks for power distribution:
- The tracks won’t vaporize as easily during accidental shorts.
- Wider tracks have a lower voltage drop.
- Wider tracks have less heating, it improves efficiency a tiny bit.
- Wider tracks are easy to recognize as power distribution, which is handy during prototyping.
- Wider tracks have lower impedance (less inductance).
- “Distributed capacitance” can be an advantage if power planes are combined with a GND plane, but this is a bit nitpicking for most designs.
The most common approach for power distribution is to use relatively wide tracks. Somewhere between 1mm (good for 2.3A) and 3 mm (Max 5A). So as long as you stay below 2A there is little need to think very hard about power distribution (Although decoupling capacitors and "excessive track length) is to be avoided. With analog designs even small voltage drops can be important).
There is also no need to reduce track size just because the power goes only to an IC that needs maximum of 10mA. Unless PCB area is really a problem, it’s much more common and easier to just route all power with the same track width. The easiest approach is to put all power net into a single netclass with your chosen track width, and this is good enough for all (simple) designs.
If you really want to work with different track widths the simplest approach is to set the netclass width to the narrow tracks, and then just use wider tracks for the biggest part of the routing. If you always want to work with the netclass widths you have to split the net with Net Ties.
That’s a decent start, and used to be the most common approach. When you get into higher speed designs, then the GND plane becomes more important, and in modern times it is very common to see both inner layers reserved for GND planes. The GND plane is about the most important part of any (Especially digital) PCB design. As a hobbyist you can compromise here, but if you want to conform to EMC regulations (and also make your design more robust) Then at least one continuous GND plane is mandatory. Small interruptions can not be avoided, but do not make any interruption in your GND plane that is bigger then around 5mm. So do not make a long row of via’s, but spread the via’s around, or make small clusters of (up to around 4) via’s.
In KiCad, power symbols work as global labels. Power symbols also connect to labels with the same name. But you wrote “similar”, and that’s not true. Labels are case sensitive, change a dash into an underscore and it’s a different label.
I’m sorry for the long answer. I doubled up a lot of things but my mid is a bit fuzzy again at the moment, and it’s the best I can do.