Set your design rules for a realtively thick tracewidth & via diameter.
Make sure there is no solder mask over the vias (So they get filled with solder).
While drawing a trace (use ‘x’ in PcbNew) every time you press ‘v’ you switch to the other side of the board, and if yo do that during drawing a via is automatically added.
Draw a bunch of vias in a grid like this:
If both sides have a polygon then your vias and the traces will automatically be a part of it.
Another very quick way for drawing lots of vias is by right clicking on a via and select “create an array [Ctrl +N]”
In PcbNew there is an option to clean the pcb a bit with:
PcbNew -> Edit -> Cleanup Tracks & Vias.
This function might remove a lot of your via efforts but it might be worth experimenting a bit with how it works and could be usefull for you.
I think the term you are looking for is via stitching. With luck there will be direct support for this in kicad v5 but until then you need to use a workaround. The best workaround ist to use one pad footprints. More details:
Sir I think you’ve just changed the way I look at kicad for good! but the colors annoy me… is there something to do about it or I’ll have to get used to it?(too dark)
[quote=“Mike_Lemon, post:8, topic:7359”]
but the colors annoy me[/quote]
Small Idea:
As you are creating a footprint for via stitching and you want to draw the via’s in some repetitive patern (as in your photo’s). Then you can of course draw a bunch of those via’s in the same footprint.
Still struggeling with the vias thing when I try to do it manually beacuse it snaps to the component pad when doing it or after the F11 view thing the vias just loos relativity and disconnect from the fill zones
now like I said I did try to make foot prints for it but I don’t know how to use them properly…
because when I import them as foot prints externally their net is not connected to anything and that makes all sort of problems
Post number 6 should look like my screenshot. I Highlighted the link.
If not could you make a screenshot of what you see and give details about your browser?
Well great temporary solution that made me with KiCad had a parametric driven design ability and a history time line like in Fusion 360 to correct array mistakes but what even I believe that over time this will get fixed because every hole in a boat has to get fixed when it arrived at the dock.
open the pad properties of one of the pads that is already connected to the correct net. Copy the netname from there. (Not the full netname is shown within the normal view. There is at least a ‘/’ that is missing.)
That helps thanks still with there was a better user interface for that KiCad.
Why can’t Altium be like Autodesk and offer an entrepreneur licence version?
Ok guys one last question I have thousandths of vias in my board now and it needs to go for manufacturing is it a good idea or they don’t charge for vias?
