DC to DC converter

Don’t use a fill on the switch node. It is very noisy and will radiate everywhere. Use tracks only for connection.

It looks that you don’t fully understand how zones work. You need not to create zone islands at top yourself - they will be created for you by KiCad.
Just draw GND top layer zone around whole PCB (zone bigger then PCB) and see what will happen after zones will be filled (hotkey ‘b’). It is what I was thinking writing about one GND zone.
When adding zones I typically set Clearance to 0.25, Minimum width to 0.2, and Thermal relief gap and thermal spoke width both to 0.25.

When you will see how zones work you can think that zone fill is going to close to your SW net. Because of it you can add around your SW net an area with only “Keep out copper fill” set.

I’m not power designer and I have doubts if such protection should also be set at bottom or not. Typical PCB thickness is 1.5mm. It is 6 times bigger distance then 0.25 mm Cleranace at top.
Argument to restrict GND here at bottom - to make capacitance from SW node to GND smaller.
Argument to left solid GND at bottom - it works like shielding making emissions from SW net smaller.
And I don’t know who is the winner.

Yes. If POT lost contact during regulation you will get smaller voltage at output and not the highest IC can generate.

You need not to be sorry. If someone wants to answer your questions it is his (also mine) free will. Nobody forces anyone to do anything so it’s not your responsibility if someone wants to spend time on it.

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Yes I don’t think bottom PCB need any changes that won’t be worth at such a small node

And as for filling zones that is a little bit dark area that I need to know

A keep out zone from to sw node to U1 seems ?

I think I should add that POT to GND to it
MT3608 have tendency to burn when voltage gose up very quick I only need range of 5v to 15v at max

If you have different zones one at another they can be shorted if they both have the same priority level (order of creation).
In KiCad V5 when you added zones they got by default the same priority. Now (since V6 or V7, I’m not sure) they got different priorities but you may want to change their order.

I don’t understand your doubts.
I was not speaking about node but about net (= all nodes connected to that net + all tracks making this connection). At your fist picture there are net named ‘SW’. I don’t know where from you get that name as at schematic there is no ‘SW’ label that would be normally used to name that net.

Do you really need it being regulated? Isn’t it better to make several such PCBs and set each one a different voltage by using right resistors and not POT. If you need you can desolder such resistors and use others.

Yes circuit do have those nets I just hid the labels

Useing several board is a long term solution

I just was just want it variable :sweat_smile: no solid reason

Will make a small revision in few days let’s see how it turns out

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Yes! In a boost converter, the input current all passes through the inductor, so there is not so much activity at the inductor input. The switching happens at the inductor output, and that is where the “hot loop” is.

In a buck converter, the hot loop is at the input of the inductor.

Yes I have been doing this for > 40 years but I would greatly prefer to explain it adequately as opposed to asking you to take my word for it.

Solid ground plane as you show ought to be good. I was trying to say that the ground plane ought to at least cover the bottom side copper area underneath the “hot loop” that I described.

Funny…I google the topic “boost converter hot loop” and this came up near the top. Maybe because google knew it was me and found my name…

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Is that anything like a buckboard?

https://www.google.com/search?q=buckboard&rlz=1C1RXMK_enUS1029US1029&oq=buckboard&aqs=chrome..69i57j0i512l3j46i175i199i512j0i512j46i175i199i512l2j0i512l2.5417j0j15&sourceid=chrome&ie=UTF-8

Hah! :slight_smile:

or was it:
back-in-bowl

Makes no sense but funny as heck! :crazy_face:

My “Are you sure?” was about:

In my opinion it goes back to input capacitor and not to IC gnd pin.

Ny two eurocents:

When switch closed:
input (cap) + → inductor → IC switch → IC gnd → input (cap) gnd.
On the output side the output cap. supplies the load independently.

When switch open:
input (cap) + → inductor → diode → output (cap) + → output (cap) gnd → input (cap) gnd.

While everyone is entitled to their opinion, I am giving you electronics theory that has been proven in the lab. Opinions are likely to be right or wrong in such situations…

Perhaps my use of the term “AC Current” is not the best, because I am discussing AC current (or at least the AC component of the current) through the diode for example. Instead of AC, think of rapid changes in current flow = high dI/dt. So really the critical concern is the path of high dI/dt. That certainly passes through the IC, its switchnode pin, and its ground pin when the FET is internal to the IC.

In a boost converter producing 5 Amps of output current, you could get a peak of 12 Amps passing through the switching FET (may be inside the IC) to its ground pin. This current can change to zero in 20 nSec so you get dI/dt = 600 mA/nSec through the FET drain and source, or IC ground pin if we are discussing an IC with internal FET. If you have 10 nH in series with either of these pins, that will produce a 6V spike which could cause a lot of noise or even exceed the FET voltage rating if you did not have much margin to begin with.

The inductor will not have high dI/dt passing through it, and it is an inductor anyway. So layout inductance there just increases the total inductance slightly.

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That definitely seems right will do some
More layout according to many advice I was given

Seems like having output cap and IC GND to via to ground plane can have consciousness

And yes datasheet do say to keep input loop close as possible

Some what difference questions
Do PCB price differ from different shape to shape? But over all same surface area

If shapes you have in mind are all rectangular with the same area but different side ratio and you think of mass production then you can assume price will be the same.
PCBs are manufactured by putting many of them together at one panel with factory default size (they can use several typical sizes). And I suppose you can assume panel price being the same and the question is how many PCBs are at one panel. Some shapes can force you to waste large areas.
If you are speaking about ordering few PCBs than each company’s price policy may be different.
I have never ordered in China but I remember some offers that had constant price provided your PCB is under 10x10cm. So price for 3x3cm was the same as for 10x10cm so definitely not the same for area.

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Nobody is questioning it. IC gnd pin has to have low impedance connection to gnd pin of input capacitor. Diode cathode has to have good connection to output capacitor and output capacitor gnd pin has to have good connection to input capacitor gnd pin.
If both (IC gnd pin and output capacitor gnd pin) have to have good connection to input capacitor gnd pin than as the result they also have good connection between them but it is only ‘side effect’.
The current pulses of switching Mosfet flows from IC gnd pin to input capacitor gnd pin. And their AC part (their dI/dt) is also connected with that circuit and not with connection between output capacitor gnd pin and IC gnd pin.
What I was asking was about what you have written:

I supposed that may be you are speaking about something I don’t know and my nature is that if I find something (in electronic) I don’t know I want to learn it (until it is not too complicated for me). Now I suppose it was just a slight inaccuracy in the statement.

No. The input capacitor does not see severe pulsing because its current is filtered by the inductor. It is the output capacitor that gets the current pulses.

Let’s see if I understand:
The current from the inductor goes through the diode into the output capacitor (+).
The other half of the loop is output capacitor gnd, input capacitor gnd and input capacitor (+) to inductor input side.
The highest dI/dt as well as ripple amplitude is on the mosfet and the diode, as they alternate between zero and a maximum current depending on load, input/output voltages etc. and the transition is fast.
Ripple current on the input capacitor and inductor is less, as there is always some current flowing; either the current delivered to the diode or the current drawn by the mosfet.

That is closer. The fact is that the inductor current CAN go to zero if the converter is operating in Discontinuous Conduction Mode (DCM). But the slope of the inductor current (dI/dt) should be much slower. And inductance in the inductor…is expected (the circuit is designed for it.)

The input current goes either into the diode or the MOSFET drain, depending on whether the FET is turned ON or OFF. The point is that those transitions are very rapid in Amperes per nanosecond. The output capacitor and the MOSFET drain and source pins all handle that high dI/dt.