DC to DC converter

My intention was not to say that it ‘not mater at all’ but ‘here can be ignored at all’. And ‘here’ I used to relate to the whole discussion started with:

  • you said that AC current goes from output capacitor to IC gnd pin,
  • I asked ‘Are you sure’.

The ripple current switches between two circuits and connection output capacitor-IC gnd pin is not in any one of them.
-------
Edit.
In above text I have twice written ‘input capacitor’ instead of ‘output capacitor’. Now it is corrected.
And I know how it happened. I was thinking about capacitor at the left at PCB and at the left there are always input :slight_smile:
That error was very important for the meaning of the statement.
-------
So in that sense ripple current has nothing to this connection and the discussion (in my opinion) was about this one connection. From the high frequency AC part of current view the ripple current is close to DC and it is this AC part that relates to this one connection so as we discuss mainly (only) this connection then ripple current can be ignored. Not at all but in this discussion.

This discussed connection is at GND level. The second connection with the same problems is at drain level - for AC part the connection between diode and IC is more important than connection between diode and L and between IC and L.
You said it in your first post:

Because of inductor directly connected here I had no problems to accept it. But for GND connection I didn’t sow that there is also inductor here as it is in serie with input capacitor. It is why at the same situation at drain and at source I was looking differently.

I’m very happy that I learned this lesson.

For me it is better.

I prefer continuous GND at bottom so I would consider connecting from output to R2 around C3,C4 gnd pins or even around J4 to not have the output GND current going through vias.
I think (but I’m not sure) that this connection going in some distance from switching currents can be a little longer with no negative consequences.

Added later:
What for is R1? I found MT3608 without ‘L’ and pin 6 is NC. Do with ‘L’ that pin has some function like frequency setting with R1 or something else?

Yes it’s for current limit ( I added datasheet)

Yes it is desirable to have same GND there
( everyone pointed to have same GND)

R2 need +VOUT I am planning to have it through via’s
But is it desirable? On to layer board ( noise problem )

Another way is around the j4

The track from +VOUT to R2 can be long but not too long and away from sw net and L1.

2201121530_XI-AN-Aerosemi-Tech-MT3608L_C2932326.pdf (679.2 KB)

When you look at PCB during design the connection from out to R2 around J4 looks being long, but really it will be only 1.5cm.
You can jump with R2 over the connection from output capacitors to IC gnd but it is the connection we were discussing as top important.
You can jump with R2 over connection J4 to capacitors gnd (GND connection of POT is not existing one - it is on bottom) but than J4 connection will have narrow piece under this resistor and I don’t know what current do you expect (to avoid this you can use bigger resistor). But you can have this narrow track + parallel connection from capacitors to GND plane via set of vias and together you can assume it is enough.
At my PCBs I place footprints touching each other with their courtyards. DRC don’t like it but I switched this check off. I have all footprints courtyard in 0.1mm grid and I work with 0.1mm grid so when I place them touching their courtyard lines are one on another. I would certainly place out capacitors touching IC and little (only little to not shift diode too much) up to be able to connect capacitors GND pins short way to Ic gnd pin. I would also use diode footprint dedicated to diode I will use and not such universal one.

R2 to cap will have little to no current it just feedback voltage

Going it around the j4 is what I am looking for

Many people have said to avoid feedback connection from bottom of 2 layer board I am not sure about it

Cap can go a little higher up as 3d view suggest so nice gap there

I have changed SMA package diode footprint only

( it is still handsolder variation as it dose look like easy to solder I am lacking good equipment for solder work
THAY ARE EXPENSIVE :sob:)

Over all is this layout seems decent right?

Yes I like that placement now. Getting the placement right is the first important task…

So this is the final layout
And

What exactly is this DRC error means?
Footprint seems okay

Project file and some screenshot






step_up_MT3608L.zip (856.1 KB)

That you modified the footprint on the board, so it is different than the one in the library, and any changes that you potentially made will be reset if you update update the PCB from schematic or otherwise reset the assigned footprint.

If you intended to change the footprint, you should save a copy to a local library, if you didn’t intended any modifications, it’s probably best to reset the footprint to the library version.

The PCB looks very professional to me. What I would maybe add is two GND stitching vias on both sides of the track between R3 and R4 to reduce the break in the top GND layer. I’ve also noticed you haven’t used any thermal spokes, which is fine, but could make soldering a little bit harder than necessary.

1 Like

Does the footprint you are using on the PCB match the footprint you have assigned to your symbol in the schematic?

It should match I’ll check

First of all I made the symbol for IC in symbol editor
And added footprint which is available for SOT-23-6
Handsolder variant

It fixed now
for some Reason it was something else
It said footprint didn’t exist then I update it from schematic and now it’s fine

Yes I will add some via there

And how well is it for manufacturing ?

It should not be violating any Clearance

You should fix this sharp angle, it could trap etchant and result in over etching . . .

1 Like

I don’t see any problem. The track highlighted by @RaptorUK could indeed be improved by making it enter the pads more straight or adding teardrops. Also rounded pads are nowadays generally recommended, which you could fix by using different U1 and L1 footprints (or changing the existing ones). But this is nitpicking.

That does seem to be problem
I’ll slide that resistor to left a little

Any other points that should be considered related to manufacturing?

What is this about rounded pads ?
Can you explain please

The pads of your MT3608L have a rectangular shape, which means that you have relatively sharp 90 degree corners, that can act as a weak point and would make it easier to start “peeling off” the pad. Compare this to the footprints of your resistors/capacitors, which have rounded off corners. Rounded corner also fit generally better to the shape of the solder.

I don’t have KiCad ready, but compare the standard SOT-23-6 footprint to the handsoldering one. I think the handsoldering ones are older and manually created and the regular ones should have been updated to have proper rounded corners.

Have a read of this thread: Why Rounded rectangular pads in place of rectangular pads - Layout / Footprints - KiCad.info Forums

1 Like

Hm yes that is true that 90 degree pads to peel off
Have seen that many times

Standard SOT-23 ones are rounded edges

As for L1 it straight from manufacturer
Need to see if I can find something similar

You can just drag the track so it exits the pad at the corner . . .

1 Like