Custom design rule for z/height clearance?

Layout
1

I’m unable to find any information in the documentation or examples about creating a custom design rule to check the height clearance between net classes. Is this possible?
This feature would be useful to prevent dielectric breakdown in high voltage designs and protect sensitive nets from crosstalk.

Something like:

(version 1)

(rule "Z clearance"
  (constraint physical_z_clearance (min 0.2mm))
  (condition "B.NetClass == 'HV'")
)

that would use the stack up to check the distance.
I was going to create an issue on GitLab but thought I’d ask if anyone knows if this feature already exists first.

2

I’m not aware of this existing, there do appear to be similar open issues on the GitLab though. See this previous topic:

3

Ah, no i did not mean component height, but rather height clearance between metal features inside the pcb. For example two traces on different layers.

4

I understand but I 'not aware of this neither. As a designer I think HV tracks should run AMAP on the same layer separated with the right clearance (you can also increase isolation drilling slots between HV tracks). Related to the crosstalk there are workarounds (see shielding) in order to avoid this.

5

Well, I do not agree that “do not make mistakes” is a valid alternative to drc. Z direction clearance is often part of standards.

I have boards with mixed signals where I definitely would benefit from this check. I’ve had issues where 200um wide traces crossing at 90 degrees on adjacent layers presenting enough capacitive coupling to require a redesign.
But that is besides the point, the question is not why, but rather how, to do z clearance check.

Another useful check could be to somehow require metal between net classes, in both plane and z direction, in order to enforce guard/bootstrap nets… Any idea how to check for that?

6

But that is besides the point, the question is not why, but rather how, to do z clearance check.

Designs which have requirements like this would probably benefit from well defined signal, power and ground layers in general, a named keepout zone in conjunction with a rule like this:

(rule disallow_netclass
	(condition "A.hasNetclass('signals') && A.intersectsArea('power_plane_zone')")
	(constraint disallow track)
)

would accomplish something with a similar effect today.

A change to slightly improve upon that could be to expose the layer types as defined in the stackup to the conditions, leading to a rule similar to this:

(rule disallow_netclass_on_power
	(condition "A.hasNetclass('signals') && A.onLayerType('power')")
	(constraint disallow track)
)

Though this would only be useful if there also existed checks for adjacent signal layers in the stackup, maybe along with dielectric thickness in the stackup.

Another useful check could be to somehow require metal between net classes, in both plane and z direction, in order to enforce guard/bootstrap nets… Any idea how to check for that?

That sounds tricky for in-plane, a workaround that works today could be to utilise large clearance or creepage values for the net classes in question, but that does not guarantee separation by copper.

To me it sounds like generalising this for any copper would be quite difficult, but what might work is to have a test like “track A and track B may not be contained in the same inner outline of a copper zone, but have to be in one”.

7

It is not possible today, and there isn’t a feature request open for it yet. I’d suggest opening one.