In KiCAD, the Edge.Cuts define the outline of the board, the boards have always at minimum one Front Copper layer and a Back Copper layer. (F.Cu and B.Cu), if you don’t need one of them (because maybe your are planing to make a single sided board) you should just leave it empty.
Here is a link to the PCBNew documentation, maybe it will clarify some stuff, but at minimum it will help with the general idea.
You can define PADS as plated (Through-hole) or not plated (NPTH) but I do not believe that you can define vias like that, after all the purpose is to connect the front and back of the board, through their body, the plated part.
You can insert a pad footprint (Add footprints->SolderWirePad and double click on it), once it is inserted, you can modify it as you see fit (diameter, plated, non plated, drill size, etc.)
If the CAD tool can convert your design into an eagle file, that can be imported into KiCAD. If you have the PDF, you can re-enter the schematic onto the tool.
Gerber is a file describing only one layer - don’t cares of other layers.
Via’s task is to connect some layers. You can’t connect layers if you have only one.
Board outline is the board outline (how the board is cut out). It has close to nothing to represent copper.
Edge cuts only defines the edge cuts. You will not have a copper if you not add it yourself.
You really should do the simple example - the PCB with two resistors on it connected paralel, but KiCad way and not your way. Then you can check your results by View - 3D Viewer.
And then come back here.
In footprint definition you can specify for each hole you have there if it is plated or not.
Not plated via simply doesn’t exist as via is to connect layers and not let air flow through PCB.
In PCBs there are planty holes being a part of footprint or via and typically only few used for mechanical purposes. There is no special tool for that purpose - you can do special footprint having one pad with hole and that way you add holes the same way as other elements.
I always place holes also in the corner of my schematic to avoid them being deleted when synchronizing PCB with schematic after doing some changes in schematic.
Yes and not.
Rectangle at edge cut inside main pcb rectangle means it is cutout. But you probably don’t wont manufacturer to prepare a special tool for your PCB to cut it using press. You should specify it to be doable (rounded corners according to used cutter - I typically assume 2mm diameter cutter).
So then a plated through hole can be done by either placing a via, adding a pad, or adding a footprint - am I correct in this understanding? And if it is done by adding a pad or a footprint, then the implication (“it can be modified”) is that the outline of the pad or footprint can then be deleted, leaving only the plated through hole located on the “pad” area which already exists on my board layout - is this correct?
Yes. I intend to have only a few non plated through holes that are used for mechanical mounting of the board, and most of the holes are plated through. But if I do not want copper around the non plated through holes, the copper area of the pad can be deleted so that only the hole remains, correct?
I had mentioned this earlier. The only reasons I am not making the boards myself by my usual process are because some of the components used require plated through holes underneath the case or a tab, which are intended to help act as a heatsink. So these components need to be soldered to a flat surface, and one of the boards will also be mounted to a heatsink which again requires it to be flat. So I need actual plated through holes, and cannot just pass wires between the two sides of the board and solder them. In addition, the board materials required are pretty much impossible to obtain in small quantities. Except for these 3 boards, the rest of the project is normal through hole leaded components on standard FR4, so no problem making those boards by the usual process.
So then I will need to add a rectangle identical to the board outline to the B.Cu layer, to represent unetched copper on the entire rear surface of the board - is this correct?
Excellent, thanks! Would it be better to provide a 1-2mm radius on the corners of the cutout (and file the corners square myself), or represent the cutout as an area of unetched copper on the rear of the board (as a guide) and make the entire cutout myself? You post implies that the board houses may charge more for making the cutout, and that it would be cheaper to make the cutout myself since I would have to file the corners square anyways.
That is exactly what I was reading, and as I said, it only prompted more questions instead of providing answers! So many thanks to everyone who has been providing useful information!
No, none of the software that I have is able to save as this file type, only the standard file types used in graphic design.
You are asking questions that to answer them I would have to do some experiments as I just don’t know as I have never used your way of working with KiCad. May be others know. At that moment I even don’t remember how not plated holes are defined in footprint. I have defined them about 2 years ago and I am using them if needed. Two years after doing something once is enough for me to forgot.
You should add rectangle bigger than your PCB (it will be easier to select it later). KiCad (shortcut b) automatically fills that according to the rules - it will have some distance from PCB border. Manufacturers specify the minimum distance between copper edge and PCB edge.
I suppose you will be not charged more for one opening. It is better to get everything done then to assume to finish it yourself. If I need the full rectangle I just add some extras at corners - just as assumed cutter would do if run a little out of rectangle. Typical cutter is 2mm but there are also smaller used. You should check what are the possibilities in the factory you plan to use.
So how do I draw a rectangle on the B.Cu layer, to represent the unetched copper on the rear of the board and have two layers for the plated through holes?
If I select the B.Cu layer, then select add graphic polygon and draw the rectangle, it gets placed on the Dwgs.User layer, with no apparent way to move it to the correct layer. I was able to draw a rectangle on the Edge.Cuts layer easily enough, but this doesn’t work on the B.Cu layer.
If I select the rectangle that is already drawn on the Edge.Cuts layer, and attempt to copy and paste it, it only pastes on the Edge.Cuts layer, again with no apparent way to move it to the B.Cu layer.
KiCad is more object oriented, than layer oriented. Lines drawn on Edge.Cuts automatically propagate to all copper layers (and some technical layers). (Later during plotting you can exclude it from certain layers). So you only need to draw the outline on Edge.Cuts.
A Polygon is just for graphic entities. To draw a “rectangle” on a copper layer use Pcbnew / Place / Zone.
KiCad has a lot of built in functionality around zones. For example I usually draw one in the form of a pentagon around the PCB, and then it gets automatically clipped by the graphics on Edge.Cuts layer.
Zones also automatically keep their distance (clearance) from copper tracks of other nets (after re-calculation with B). But for this to work you need a netlist and assign a net to the zone itself, so it knows where to connect to, and what to keep clear of. (And to get a netlist, you need a schematic…).
So then I do not need to put anything on the B.Cu layer to be able to place plated through holes, correct?
If that is correct, then how is it specified that the back surface of the board is a layer of unetched copper?
Or is it best or most correct to use “place zone” to represent the unetched copper surface on the rear of the board?
So then I will need to add a rectangle identical to the board outline to the B.Cu layer, to represent unetched copper on the entire rear surface of the board - is this correct?
Now this might be a problem. Normally you have a copper setback from the board edge.There is a good reason for this - the edge is cut with a mil and not sawn. If the copper extends to the very edge of the board it will also be cut by the milling bit. Copper is ‘sticky’ and will clog up the bit and stop it cutting - and likely break the bit. I expect that the manufacturer will pick up on this and may reject your design or charge extra if you insist. Unsurprisingly, KiCad deals with this automatically in the normal workflow …
Thanks, I didn’t know this! What is the typical or standard setback that is used? Easy enough to make everything conform to this requirement, now that I know it exists.
I’ve just been lurking on this thread, but this caught my attention. What is the material you want these 3 boards made in? What, if anything, of the board material requires a unique (to normal FR4) manufacturing process?
Ok, so I appear to have successfully defined the copper ground plane on the rear of the board, selected the F.Cu and B.Cu layers as a pair, and placed a via. Then I moved it into it’s exact proper position and attempted to adjust it to the correct size. But the properties dialog box specifies a “diameter” and “drill” size. Am I correct to assume that the “drill” size is the size of the actual hole, and the “diameter” is a copper area around the edges of the hole (on the two layers that the via connects)? If so, am I further correct that since the copper area around the hole is already defined by the size of the trace on the F.Cu layer and the unetched copper ground plane on the B.Cu layer, the “diameter” can be ignored as long as it is larger than the “drill” size, and that KiCAD will understand what each end of the via is supposed to connect to? Or do I have to do something else in addition, such as set the “diameter” to be equal to the “drill” size? Again, the documentation offers no definition of what “drill” and “diameter” mean.
One board is Rogers RO4350, one is Rogers AD255C, and the FR4 board is .087" or .090" thickness. I haven’t seen anyplace that these board materials can be purchased by an individual in small quantities. In addition to this, the requirement for plated through holes with a flat surface means that there is really no other practical option than to send gerber files off to one of the board houses.
Incorrect, the diameter of the via (the copper outside the hole, known as annular ring) is manufacturer dependent, a conservative size is > 0,15mm, this information is normally provided by the board manufacturer.
From oshpark:
What happens if I violate the annular ring spec?
Generally nothing too bad, but it should be avoided whenever possible.
The annular ring spec accounts for worst-case fabrication tolerances. Since our typical tolerances are below that, the annular ring usually can decrease by 1 mil (0.0254mm) without serious issues. However, issues that do occur from annular ring violations can be very inconsistent and difficult to debug.
Yes you have it right. But a detail that often trips people up is the drill size. That isn’t actually the size of the drill to use for plated holes. It is the finished hole. (So it would be the drill size for non-plated holes.) The plating on the inside of the hole has a thickness which depends on the process the manufacturer uses. It is up to the manufacturer to know their own process and drill the hole slightly oversized so the plating thickness closes the hole down to the designer’s specified hole size. The diameter specification you are right is for the amount of copper around the via, and the copper around the hole is known as the annular ring. (These are industry terms.) It is important to have a minimum amount of copper around the drill hole to allow for copper to be left all the way around the hole when a slightly larger than specified drill is used, and to account for drill placement tolerances.
Yes, on the back for your board as you have described it, but for the front it depends on the width of the trace the via connects to. If the connecting trace has a thinner width than the drill hole then the via diameter is to enforce that annular ring. If the via is embedded in a copper pour like you want for your bottom side (known as a zone in KiCad) or in a really wide trace, the annular ring won’t show.
Here is a decent explanation about vias that I found searching for “pcb via cross section” on a web search engine:
This will also be affected by the board’s finish that you specify from the manufacturer. The cheaper HASL may leave small “puddles” of solder on the edges of some pads, but since this melts during the soldering process this is usually not a problem for tabs and heatskins. Even IC packages with pads on the bottom of the package often aren’t adversely affected by this. The ENIG process provides an exceptionally flat surface, usually required for BGA packages, LLC packages, or fine pitch packages. This finish detail isn’t normally specified in the Gerbers, rather you usually have to choose this specification on your job order, or a special job file submitted along with the Gerbers. Check with your manufacturer to find how they want you to communicate this requirement for your order.
P.S. Is it me, or does the screenshot that all about circuits uses for their QFN package showing thermal vias look like it’s from KiCad?
I appear to have gotten all of the vias placed correctly. I believe that the next step is going to be saving as or exporting the board layout as gerber files (and the drill file), and double checking everything to ensure that it all properly conforms to spec. But before I do that, I have one additional question: On the F.Cu layer, the traces appear on the screen as outlines (the shapes of the traces appear “empty”, rather than “filled”). Is this the way it is supposed to appear? If not, what will I need to do, to ensure that the traces properly represent solid shapes of copper rather than lines (or “empty outlines”) on the actual boards?
To explain further, I will use this example. A trace that is the shape of a rectangle appears on the F.Cu layer as the outline of the rectangle (the center is empty), rather than the solid filled shape of a rectangle. On the finished board, this trace needs to be a solid rectangle of copper.
Thanks for this useful information! Again, this is something I had never heard of before. I had always thought that a tinned finish was a tinned finish, and was unaware that there was more than one type of tinned finish. For the board that is supposed to be mounted flat against a heatsink, would it be necessary to specify ENIG? Or if HASL is used, would it be sufficient to make the B.Cu groundplane surface flat by placing a piece of fine grit sandpaper on a piece of glass, and sanding the board in a figure-8 pattern? (Obviously the pressure against the board should be distrubuted as evenly as possible, and the process cannot be done aggressively. I also plan to make the mounting surface of the heatsink flat by this same method.) I would imagine that ENIG is more expensive. If it is recommended to use ENIG for the board that will mount to a heatsink (rather than using HASL and sanding it flat), is it possible to specify ENIG on the groundplane surface on the rear of the board, and HASL on the front of the board?
At left of screen you have a serie of switches. One of them is “Show tracks in outline mode.”
2 days ago I have written:
You can see in 3D how your PCB looks like. You can rotate it to see both sides …
I have an overwhelming impression that you read the answers very selectively.
