Copper Zone Constrain H, V, 45 Degree Spazzing Out

This may already be solved in the 5.99/6.0 nightlies. If so, I apologize.

In KiCad 5.1.6 and presumably earlier versions, the “Constrain outline to H, V, and 45 degrees” option in the Create Copper Zone Properties window behaves very strangely. It makes radical assumptions about what shape you are wanting rather than simply constraining each line to straight and 45 degree angles where you click.

I recorded a video:

NOTE: This same issue applies if you hold down the CTRL key when drawing a pour. It tries to infer a lot from the starting point of your polygon, rather than just ensuring that you are only doing 45 or 90 degree lines from each previous last vertex/click. In other words, it’s trying to outthink you.

Created a bug report.

As a work-around (or general practice if you end up liking this workflow), you can surround the entire board with a rectangular copper fill zone. (Also useful technique for round boards or boards with cuves in the edges.) The copper fill will only happen inside the edge-cuts line. A common extension of this to make it easier to select coincident fills on different layers is to have the over-sized zone boundaries on different layers offset from each other.

Granted, your issue is still important to stomp on for cases where one is trying to draw a complex shaped zone that is different than the shape of the board.

There is currently a kluge (don’t know if it will still work this way in v6+) for copper to edge clearance. When calculating fills (and checking clearance for DRC) the width of the edge-cuts lines is taken into account as if it is copper. The clearance will be from the edge of the edge-cuts line to copper (just like between two pieces of copper). But, when manufactured the board edge will be cut along the centerline of the edge-cuts line. So if you want minimum 1mm copper to edge clearance, make your edge-cut lines (1mm - [minimum copper clearance])*2 wide.

Thank you for this. This was suggested to me in the #kicad IRC as well and I’ve done this for now. It seems to work well. Sure easier than drawing a polygon for my uniquely shaped PCB. :slight_smile:

I follow a different path.
Usually I make the zone outline in weird shapes, far outside the border of the PCB, and then let KiCad manage to clip it near the board edge.

The weird shape is an instant alert if anything goes wrong during gerber creation. If the zones are not clipped properly, then you see it instantly.

Because of the weird shapes, the edges of the zones do not overlap, and are easy to select for modifying zone properties.

If the board outline is not a closed shape, which it should always be, then the zones outside the board get filled. which is also an instant warning that there is an error in the board outline.

Some other tricks:
I usually draw zones on a very coarse grid such as 1 or even 5mm. This makes it easy to make horizontal and 45 degree lines without fiddling with extra settings in KiCad.

When modifying zone boundaries, be aware of aligning center points or corners with your grid if you want 25 degree corners.

The retraction from the board outline can (at the moment, it’s a hack) be adjusted by setting the line widht of the tracks on the Edge.Cuts layer. These simply act as a PCB track with a clearance in this regard.

As an example, the board I’m working on looks like:

On some other example here on the forum there is a board with a big pentagon drawn around it :slight_smile: :slight_smile: :slight_smile:

I see you’ve found a way to work around the bug. Understandable. But it just adds extra steps or imprecision when using zone pours in place of traces around ICs for better decoupling and noise reduction. We all want to make the most use out of the available copper, and thus bug makes that take several extra steps.

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