Copper pour got into pad clearance zone

Hi all,

I have a problem that I cannot find a work around.
Please take a look at the image attached first.

  1. pad 1, pad 2 and trace all have 0.6mm clearance.
  2. Pad clearance is visible from the red outline from upper left image.
  3. upper right image shows that the copper pour got inside of the pad clearance.
  4. After switching to OpenGL mode, it looks like copper fill didn’t care about the clearance set by the pad, it only takes in account of trace clearance.

Please let me know if you have any idea.


Both caer and Joan_sparky explained what happened to my circuit. Please read their replies for detailed explanation.
Thanks for help!

I dont think there is a problem.
Here is my explanation of how the shape that you see has been constructed:

The top part represents how your clearance is expanded from the recangular pads.
The bottom part shows the resulting “no fill zone”. You can see that it creates the same little bump that you don’t understand.

Tell me if I misunderstood.


To stay with @caer s explanation, look at this copper fill that surrounds a rectangular pad:

Obviously the outline of the copper fill is being done by KiCAD with segments of track (thus you see half of the tracks there, other half covered by the solid fill).


You are exactly right about what happened.
Thanks for pointing it out.
I always thought that the copper will never get into the visible clearance outline.
So there is no good solution to get rid of that little bump other than manually defining a keep-out zone?

I was skeptical about caer’s theory until I tried the way to check the outline that you showed here. Great explanation.
On the image that you are showing here, the outline is not coming anywhere close to the pad clearance outline. Is it because you have a clearance setup for the copper pour?

Yes. It’s set to 0.35 mm.

Btw, why are you concerned about the little bump(s)?

The pads are from the RF capacitor that connects to a 50ohms CPW line. The impedance on the CPW line is controlled by the size of the trace and gap, assuming substrate material and height are fixed. The little bump shouldn’t matter for the frequency that I am working at. It looks cleaner when not having bumps on a RF transmission line.
Thanks for the help!

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I suppose you could always add a cutout to remove those bumps.

True. But not going to be very efficient if I were to have many of those bumps at different locations

They have negligible effect on impedance and are cosmetic only

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