I know PCBNew won’t fill in a copper pour outside a recognized board outline. Maybe if there isn’t a recognized board outline no zones will get copper poured, and PCBNew didn’t recognize the graphic ploygon as board outline?
I had read a tutorial that showed this for creating the board. Either that or I read it wrong. Good chance of the latter, but I may or not admit to it. 
The problem is that graphical polygons are not outlines. They are areas. The edge cut must be an outline. (It might be possible to use the polygon to define a hole in the pcb that is milled out. But i am not sure about that. Might be a question for the devs)
This was the first thing I did for a quick test instead of using my board space. I now have a copper island floating outside the lines.
Learn something new everyday whether you want to or not. 
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Yes, it looks like that if there’s a pad outside the edge cut the zone will be filled.
To test that, I added a part, and a zone to a NEW sheet, then net-tagged 2 pins, nothing else is present.
That fills in both cases, No net, and tagged net, and tagged net creates thermals as it should.
Then I tried a polygon on edge cuts. That fills the polygon, and fails to pour the copper. ie the fill on Edge cuts is not a good idea…
Change that to lines on edge cuts, and voila, copper pour stops inside the lines.
Polygon creates a filled area, whilst lines are an outline, so the filled-on-edge-cuts will be what confused things.
The same reason that a bunch of lines on the copper layer is different to a filled polygon on the copper layer.
There is a trade-off between “being a nanny” and “giving the user too much rope”. KiCad sometimes strays too far to one side or the other. You may have a case where 1) the polygon needs to have different processing depending on layer; 2) KiCad should prevent polygons on certain layers.
There may well be people who use polygons “the wrong way” who would be annoyed if that option was taken away.
Graphical polygons and “stitching” vias where added quite late to v5. So i guess this is simply an oversight by the devs.
Reported it as a bug here (Including your write-up about the two options): https://bugs.launchpad.net/kicad/+bug/1795563
Some explanation was already given - a polygonal line is conceptually and practically different than a filled polygon.
For technical reasons it may help to think outside KiCad. Gerbers are de facto standard file format to give to your board manufacturer. They need or want a closed polygonal outline for edge cuts in the edge cut layer gerber file, not a filled area. The edge lines eventually control the CNC router or the V-cut machine.
Theoretically KiCad could convert a filled polygon to outline automatically but then it would be against how polygons are used otherwise. My vote goes for disallowing drawing anything but graphic lines on the Edge.Cuts layer.
I’d modify this to also include text. Some PCB fab houses request annotations within cutout areas to make it crystal clear what the final shape of the FR4 should be.
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