Copper Fill Inner Layers - Yes or No?


#21

EMC? or EMI?

countdown to 20 characters…


#22

No they don’t.
Consensus is about a single large GND plane without interruptions.
Return path of high frequency transients in signals should be able to follow the same path in the GND layer as they do in the signal layer to minimise loop area.
But in an already finished PCB layout some random extra via stitching willl probably improve the design.


#23

https://www.com-power.com/emi-emc-differences.html

The snag with islands of copper on the outside that are connected to an inner plane in just one or two places is that you have just made a patch antenna and when driven somewhere away from the via you get worse radiation than simply using a track to the via.


#24

People love saying you must have an unbroken ground plane. But rarely look into why its a rule of thumb.

If your signal transitions from high to low in under 10us, the return path current is going to alteast in part follow the path of least impedance instead of path of least resistance

Because of this it becomes more important to provide a way for that current to follow your signal trace as closely as reasonable.

The goal is to keep the coupling between signal and return high, when it has to detour around a cut, you create a unintentional loop antenna, the bigger the detour, the more likely it will cause you greif.

Now the easiest workaround for these cases is to provide a way for that current to stay near the signal over cuts, e.g. on a 2 layer board, when 2 traces cross, throw some ground plane vias so the signal current can hop over to the same layer as the signal, then hop back down on the other side.

This may create a small loop, but in almost every case its far better than the alternative. This will also create a small mismatch in length, however by the time 2 via lengths of mismatch matter, your already facing harder challenges.

This also applies to signals changing layers, if the edge rate is high, provide the ground current a path,


Protip: nicer via stitching
#25

Ok guys, since I had to change the pic I’ve spent a few days improving the design by removing most tracks on the inner (yellow) layer. The outer GND planes on top/bottom have been removed.

It has necessitated many more VIA’s. Still a bit of work to do but getting there…