In the cleanup process (Edit->Cleanup tracks and vias), “Net-(TP22-Pad1)” is removed because KiCad deems it dangling. Which it is not.
Pad 38 on the left obviously IS connected to TP22 (green pad right).
When does a track qualify as being not dangling?
It looks to me as though the track is not centred on pad one that is most likely causing error generation.
It is centered. There is a track segment hidden by the via.
And there is no error running the DRC.
Try selecting Preferences->General->Magnetic Pads and trace the track again.
Was set to “when tracing tracks”, that’s fine.
And then the pad is on the other (bottom) side. The item in the middle of the pad is a via.
The pad itself has no drill hole, smd pad only. It is a component, however, complete with symbol and all.
I come to think it is the same story as was discussed in another thread dealing with stichting zones.
Is there a track from the via to the round pad? (on the green layer)
No. Would be an unneccessary zero length (and hence impossible) track from the center of the via to the center of the pad, which are the same coordinates.
DRC does not complain about anything being unconnected.
I’ll leave it there. It is only one instance on the board, I just wanted to understand.
maybe a floating point error again?
You could test it by moving the via (a bit) to one side and connect it using a short trace. If it is still removed this was not the cause otherwise we know a bit more about the bug.
(It could also be that the cleanup tool only checks traces overlapping pads not vias overlapping pads. either way it would be a bug.)
Sure. Moved the pad, then there was a ratsnest line (expected behaviour). Connected it with a track -> peace in the kingdom :-), works as expected. No unconnected nets, no deletion.
Yeah. Could be the same category as the “stitching zones with vias w/o nets attached” issue that was discussed earlier and elsewhere.
Via in pad somewhere? When I did that I got punished quite a bit. .
It is for a pogo pin (test needle). No solder there. Even helps center the pin.
I know Pogo pins 
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Placing a >via< inside an smd pad used to confuse the clean up algorithm. Might still be the case. Hence my Q.
Might be.
Thought you got “punished” by some reviewers enforcing company standards. My SIEMENS past shows 
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Google “vias in pad” and you’ll find a lot of papers for and against.
I am well aware of the pros and cons.
My orignal humble question was, why KiCad erases a connected track.
