I already knew that.
…Then I want to be able to visually verify that on the schematic.
I also do not agree with this:
High quality libraries are a great resource, but in the end it is the circuit designer who is responsible for a working schematic. There simply is no way to delegate that. If a faulty schematic leads to a EUR100.000 claim for damages, the chance of recouping that from KiCad’s Library team is negligible. I would not even try it if it had a chance. But the result is the circuit designer has to check all the connections, whether they are visible or not, and making them invisible just makes verification more difficult.
Therefore I have defaulted to de-stacking all pins in library symbols, making them visible, and set the pin types back before I use it.
Which is a useful verification step, but it needs the PCB to verify the schematic. With pin stacking it is not possible to verify the schematic with the highlighting function in Eeschema.
I respect your vision, and applaud all the effort you (and others) have put in the libraries, but as long as the schematic can not be verified on it’s own while using pin stacking I will keep on un-stacking them and making them visible.
Even when you look at a symbol in the Symbol Editor it’s difficult to see what pins are stacked:
You can try to select a pin, and then KiCad tells you it found 4 pins and asks you which one you meant:
Also, setting the stacked pins to passive is another ugly workaround to cope with a limitation in KiCad. But it’s just an extra little step to change the input type after un-stacking and making them visible (The menu is open at that point anyway).
Making pins bold would indeed show there is “something” going on, but it looks to much like a bus. (which it sort of is, hmm…) But it still does not solve the visible pin numbers, which is simply a no compromise hard demand for me.