I have my minimum clearance set to .127mm and KiCad seems to do a great job honoring this as I lay down my tracks (positioning them, in theory far enough away to respect the clearance value). However, is some cases I am getting an error stating the following.
“Clearance violation (board minimum clearance 0.127 mm; actual 0.1262 mm)”.
It seems like there is some grid or rounding issue such that in certain cases it believes it is too close, even though there is no indication of this during normal layout.
How can I fix this? Obviously I can try to reposition the trace manually to get it away from the boundary but I’m hoping there is another way to leave this trace in place as I believe it is at 0.127mm clearance.
I am continously experiencing the same error. I set the board settings, I route the board using those settings, run DRC → errors.
Bas
There were at least two issues with such “rounding” problems in the PNS router in the past. If you write the used kicad version (1.067, 7.02, 7.07, ???) in your opening question we could better decide between the options “update to latest v7.0.x version” or “new bug”.
With the latest v7.0.7 I have not seen such issues during routing of the last boards.
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Running v7.0.6 so upgrading now and I’ll see if I can confirm v7.0.7 fixes the issue for me.
Re-ran DRC and still getting these same errors.
Application: KiCad PCB Editor arm64 on arm64
Version: 7.0.7, release build
Libraries:
wxWidgets 3.2.2
FreeType 2.13.0
HarfBuzz 7.3.0
FontConfig 2.14.2
libcurl/7.88.1 (SecureTransport) LibreSSL/3.3.6 zlib/1.2.11 nghttp2/1.51.0
Platform: macOS Ventura Version 13.4.1 (c) (Build 22F770820d), 64 bit, Little endian, wxMac
Build Info:
Date: Aug 14 2023 15:11:18
wxWidgets: 3.2.2 (wchar_t,wx containers)
Boost: 1.82.0
OCC: 7.7.0
Curl: 7.77.0
ngspice: 38
Compiler: Clang 13.0.0 with C++ ABI 1002
Build settings:
KICAD_SPICE=ON
You can turn on . . .
in Preferences > PCB Editor > Display Options
And Highlight Collision in the interactive router settings . . .
This might help you see what is going on . . .
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Re-ran DRC and still getting these same errors
The bugs where not in the drc (which was correct), but in the router. So you have to first correct the tracks, and then rerun the drc.
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The difference between 0.127mm and 0.1262mm is 0.8 micro meter, and you will have to zoom in a lot to see that. To me it looks like the clearance circle around the L3 pad is touching / overlapping the AR7_CTS track, but you will have to zoom in more to confirm.
If this really is a rounding bug in KiCad, then as a workaround, you can set the clearance a bit bigger (maybe 0.128mm? ) and then reduce it again to the 0.127mm just before the final DRC and creating Gerbers.
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as info: at least one gitlab issue is still open which could produce defective router results: Router laying tracks slightly tighter than DRC allows (was: lots of very near DRC collisions (rounding errors?)) (#14898) · Issues · KiCad / KiCad Source Code / kicad · GitLab
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FWIW I still have this exact same router bug with 7.0.8 is it a regression?
Probably not a surprise/new regression, that last gitlab issue mentioned directly above was targeted for 7.0.9 (unreleased as of yet). If you are curious, you could try out the 7.0 testing builds to see if the fix works for your case.
OK thanks, really love the new functionality in 7.0 but this bug makes my PCB editing unusable at the moment (the bug can be reproduced easily here with the default net class settings).
Try the 7.0.x testing build. 7.0.9 goes to RC1 tomorrow, so the current 7.0.x testing build won’t be much different to what’s going to be released as 7.0.9.
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Testing today’s nightly build then, kind of stuck with this and I never ignore DRC errors (or warnings BTW).
Thanks a lot for confirming, I’ll be careful and backup my current project version.
be careful that you get a testing build not a nightly build. they are different.
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Work greats for me too, was failing in 7.0.8 and now it’s fine. Thanks for your excellent work. Makes me think I want to contribute again to buy you some well deserved extra coffees 
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If this issue returns, then as a workaround until it is really fixed, you can use two settings for the clearance. The normal clearance used for DRC, and a somewhat bigger clearance during routing.
For quicker switching, you can create two dummy projects with the different clearances, and then use: PCB Editor / File / Board Setup / Design Rules / Net Classes / Import Settings from Another Board
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works fine now but thank you for sharing the net classes import trick, can be useful in other situations where I’d be tempted to save different presets
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