Clearance defined in netclass not being used when smaller than default

Layout
1

I am using

Application: KiCad PCB Editor x86_64 on x86_64

Version: 8.0.7, release build

Libraries:
	wxWidgets 3.2.6
	FreeType 2.13.3
	HarfBuzz 9.0.0
	FontConfig 2.15.0
	libcurl/8.10.1 OpenSSL/3.3.2 zlib/1.3.1 libidn2/2.3.7 libpsl/0.21.5 nghttp2/1.64.0

Platform: Freedesktop SDK 24.08 (Flatpak runtime), 64 bit, Little endian, wxGTK, X11, gnome, wayland
OpenGL: Intel, Mesa Intel(R) UHD Graphics (TGL GT1), 4.6 (Compatibility Profile) Mesa 24.3.1 (git-c815d651b8)

Build Info:
	Date: Dec  3 2024 06:54:59
	wxWidgets: 3.2.6 (wchar_t,wx containers) GTK+ 3.24
	Boost: 1.86.0
	OCC: 7.8.1
	Curl: 8.10.1
	ngspice: 43
	Compiler: GCC 14.2.0 with C++ ABI 1019

Build settings:

and have created the following schematic:

image
image1948×1904 137 KB

In the PCB editor settings I defined the following clearances:

image
image2940×1328 159 KB

and when I make the PCB I get this:

image
image1848×1928 218 KB

As seen, the clearance of small_clearance is not what I would expect, since it is taking the one from the default netclass:

image
image1848×1928 234 KB

The settings in the zone fill are:

image
image2330×1882 185 KB

and the design rules constraints are:

image
image2486×1944 273 KB

If I change the clearance of the default netclass to 0, then things work fine, i.e. small_clearance uses its own value. I have seen this happening in multiple PCBs.

Is this the expected behaviour, or a bug?

I attach the source files of this PCB: deleteme.zip (11.1 KB)

2

In KiCad 0 frequently means “get this parameter from more global setting” and in the case of clearance between two objects one having bigger value wins.
I have never used 0 in zone clearance. I would suppose 0 here could mean use default clearance of the net. Do GND belongs also to small_clarenace class?

3

I would say GND belongs to the default class. I have not assigned it to any.

I get the point of “larger clearance wins”, which makes total sense for things like fabrication tolerances and high voltage clearance, etc. In my case, however, I am dealing with RF so I need a very specific clearance for impedance matching.

4

Select the GND zone and the “small clearance” track at the same time. Open Inspect → Clearance resolution. You’ll probably find the answer there.