Cannot start traces on Castellated holes

Hi, I am trying to implement castellated holes in Kicad for the first time with Kicad 6.

Found this, which is a great start.

I am doing exactly the same, which is having a female harder placed on the edge of the board. However, I am having issues routing wires from there. I can do the other way around, starting from another place and ending the trace on this castellated pin.


How do I get more info on why this Thre routing start point violates DRC is happening?
The DRC window has tons of issues since the board, is just being started to be layouted.

This is a corner of the board, for instance.

I cannot start routing from any of these THT holes.

I strongly believe I cannot route from the pin since it is in the PCB edge.

So, this may be a bug with the DRC,
Or maybe a setting is not right on my project.


I just tried it and I agree with you. I assume the copper to edge clearance setting in the Board setup, Design Rules section is what is keeping you from starting a route from the castellated pin. Setting it to 0 still does not allow a route to start from the pad. Seems like there should be an exception made when that pad is set to be a castellated pin.

For now I assume you will have to work around it by routing to those pads from elsewhere in the circuit, which won’t allow you to end it at the center of the pad, but at least it will be connected.

I was thinking the exception should come to from this Has castellated pads checkbox. But it changes nothing.

Does it help if you set the pad fabrication type to castellated in pad properties?

This, right?

I have a bunch of pins in the same footprint, but doing this just for one did not work.

Does it have a property for the whole footprint?

No, it is per-pad. This might be a bug to report.

Sure, I am going to report this, then.

Now, this could be a property per footprint too since I believe most of the time people would use just an existing header on the edge. Don’t you agree?

Maybe, but it’s possible that not all footprint pads should be castellated. So we could consider adding it at a footprint level, but we could not remove it from the pad level.

Sure! I am not saying we should remove it. Just add one more option. But, cool, starting the report here. Thanks @craftyjon

Ah, too late @eelik haha

Here is my report.

I don’t think the second one is really quite relevant, we don’t want to ignore DRC checks, we want to special-case castellations

Sure, but until the special case exists, the rule should have worked, and it didn’t. I wrote the rule exactly for what Leandro wants.

(rule castellation2
(condition "A.insideCourtyard('J2') && A.Type=='Track'")
(constraint edge_clearance(min -1mm))

Rule 2 works only when running the DRC: there is no violation even when the track overlaps the edge cut. However, it doesn’t work well while routing in shove mode. Routing stops with the generic Copper to edge clearance (Board Setup → Design Rules → Constraints). It’s expected to not stop because of the edge cut at all.

I have been trying to find a way to create castellation in a simple, easy way without complex workarounds – including routing – for several years. Actually I wrote the report because I was checking if a custom rule would work in v6.99 and if I could update the FAQ article which Leandro pointed to.

Thanks for the special rule @eelik , here it does not do much even if changing the routing mode.

I figured out that if I shift the THT hole inwards a bit (the right amount actually), it starts tracing from the hole again. Here it was 0.2 mm

Euhm, no, not funny.
What you should no now is mark your issue as a duplicate of what eelik posted and then close it.

And for the next time, please first search through the open issues before you create a new one. This is also mentioned in the template when you create an issue.

There are now 1508 open issues, and the list is still growing. Creating duplicates does not help in any way.

Sure, got it, note taken.

What you should understand too, is that I am in the middle of a working day, with my boss asking to do a bunch of things. And I am also doing a bunch of things for myself, and also, trying to help the project here by posting some issues I am facing. And if I don’t do this now (while facing these issues) I won’t do it anymore.

Your comment is just a bit hard with people that are trying to contribute to the project and I face such kinds of comments everywhere, everytime. This is the main reason that all my colleagues and friends do not report shit and also prefer to use and propagated these cracked paid tools.

And for the next time, please first search through the open issues before you create a new one.

This will never happen. I would never spend a second trying to find something that I am already experiencing as an issue. Devs will see a new issue and they can decide if they want to close it or use the information there.

There are now 1508 open issues, and the list is still growing. Creating duplicates does not help in any way.

Sure, and this is not my fault. I am just helping the community by telling the issues I am facing since I believe some other people will experience the same issue too.


I came up with a new dirty workaround.

  1. Change the board outline from Edge.Cuts to another layer, let’s say (User.Eco2)
  2. Draw a new Edge.Cuts rectangle around your board (wider than the castellated holes)
  3. Route everything as usual
  4. When done, delete the wider Edge.Cuts board outline
  5. Change the original board outline from User.Eco2 back to Edge.Cuts

Steps 1 and 5 can be done easily with Edit > Edit Text & Graphics Properties...

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The people who do the actual development of KiCad are the most precious resource of this KiCad project. There are only a few handfuls of them, while there are over 10000 registered users on this forum.

If this is your way of thought, then it would be better if you just never ever create an issue on gitlab. I don’t want to be harsh on you, my only intention is to reduce the workload on the developers. Every minute they spend on reading, labeling, creating cross references, etc, is time they can not spend on actually improving KiCad itself.

What you are actually saying with that remark is that you find your time more important then their time. To me that just sounds arrogant and I value the time those volunteers are spending on KiCad much more than the time of just another one of the 10.000+ users on this forum. That is how I think about this.

Again: Creating duplicates on gitlab does not help users nor developers.

But I don’t want to be too “harsh” and I do have an alternative.
Next time you have some issue that you think may be worthy of a bug report on Gitlab, then only create a topic on this user forum. I have created several issues on gitlab for bugs that were first mentioned here, and I am willing to spend some time searching that database before I create an issue.

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Cool, am going to delete my issue.