I’m working on a project with a whole bunch of custom footprints. I’ve created some using the footprint editor manually (for small QFN and QFP packages, as well as some others with lower pin count), others (high pin count BGA’s) I’ve created with Rohrbach’s tool. Whilst routing, I notice I can’t run tracks to the pins of some of the QFN/QFP packages I’ve created and I assume I’ve messed up whilst creating them, but I’ve got no idea how to check the keep out zones of the footprints.
Any ideas what might’ve gone wrong, besides keep out zones, embedded in the footprint? I haven’t created any explicit keep out zones in pcbnew and since it’s just a handful of footprints, I’m assuming the issue is with them.
Peculiar enough, the ones that exhibit the issue aren’t the ones with the smallest pitch, so I rule out any design rules discrepancies or conflicts based on that.
I opened the footprint editor to check out a working and a non-working footprint (both have been modded at some point in the footprint editor). both have no local clearance settings set and as far as I can tell, both have pretty much similar settings on the pads.
Working:
Yup, I had to fix this for a few dif pairs I had to run literally 15 minutes, after figuring this one out too. In this case the clearance alone wouldn’t have worked though, because of the pitch, but otherwise spot on. Thanks anyways
I have run into similar situations a few times. Now (after using KiCAD for about 18 months) I know some of the things to look for, but the first few times I definitely thought the KiCAD error messages (or lack of error messages) should have given more information.
Yes, it is useful to keep this thread on the Forum. Not only could it point somebody else toward the solution to this specific problem, but your general approach - continuing to investigate and look for solutions, even after posting the question, then posting the solution you found - is commendable.
I have a problem that I think is somewhat related here. I’m working on a design that has through-hole 0.1" pitch components and then some small SMT packages: QFN20, SSOP-8 and SSOP-14. The design rules are obviously much tighter for these small packages and I decided in the beginning to stick to more conservative rules for the bigger ones. To enable this, I created additional nets for the power and ground, by connecting +5V to +5VL via 0 ohm resistor. Same was done for GND => GNDREF. So those (small) components being powered by +5VL and GNDREF had rules that allowed narrower traces and clearances. This was all going fine until something happened in Eschema, where it no longer recognizes the GNDREF symbol anymore and everything that used to be connected to it is back to being connected to GND. In other words, the netlist no longer contains GNDREF, those nets are listed as GND connections. I tried changing all the GNDREF connections to Earth (as an alternative to GND), but that didn’t help. I then tried changing them to VSS. No change. Any ideas?
