Hi, I’m new to KiCad and doing my first KiCad PCB. In the picture, I am trying to route to a double pad on a current sensor (Allegro ACS70331). It simply will not let me land on that pad, I’m assuming because of a clearance issue
. The trace pictured is 8 mil. This current sensor will be passing 250mA so I would like a thick trace. Does anyone have any suggestions on how to force it to let me draw the traces into and out of this sensor? I’m also attaching the current sensor spec.
Thanks,
LloydCurrent sensor ACS70331 800mv.pdf (1.4 MB)
The thin red lines around the pads are the clearances, and the clearances for the “LED_POWER” net and the “+5V” net are already overlapping the pads of the other. Which is not good.
Sure, you can force KiCad to stop complaining or turn of DRC completely Pcbnew / Route / Interactive Router Settings with: Mode: Highlight Collisions and Options: Allow DRC violations
But what good is that if it results in a PCB that is not (easily) manufacturable?
What is the actual clearance between those pads?
And why is there a red rectangle (also copper?) around them?
To me it looks like your footprint is faulty. The clearance between pins 2 & 3 should probably be the same as between pins 7, 8, 9, 10 on the right side. (Around 200um)
So set the clearance in your design rules to that value (Preferably add some extra tolerance maybe 10um or so) and adjust the footprint to match that clearance.
Next thing you can do is to draw a zone around the pads instead of drawing tracks to the pads. For KiCad to recognize the connection the attachment point of the pad has to be within the zone boundaries, but not further, so this gives you some extra room.
You can also turn on displaying of clearances for tracks with: Pcbnew / Preferences / Preferences / Pcbnew / Display Options / Clearance Outlines / Track Clearance / (*) Show Always.
Allegro_QFN-12 in KiCad libraries. You can copy it to your own library and modify it. Pin numbers are a bit problematic; in my own version each one of the big pads are actually two pads (with different numbers) while in this KiCad version each one is combined from several pads but with same numbers.
Eelik, thanks very much for pointing out the footprint error. I got the footprint from the Digikey library, which I now see is wrong. Kicad has a footprint for this called Allegro_QFN-12-10-1EP_3x3mm_P0.5mm but it shows the big pads as having one pin number each.
The chip has 2 pins for each of those pads. Is there a way for the symbol to connect two physical pins to 1 pad?
In the footprint you drew, how did you get two pin numbers on each pad? Are there two pads touching or is there a trick to get two pin numbers on each pad?
Thanks very much for you help.
Lloyd
PaulVDH,
Yes, the footprint is wrong. Putting a zone (pour) around the pads sounds like a good way to get a solid connection to them both. I’m asking a related question to eelik below about how to make a big pad with 2 pin numbers, or to make 2 symbol pins connect to 1 pad.
Thanks for your patience with a newbie.
Lloyd
They are just formed by two pads. You could do the same for the KiCad footprint by replacing the biggest pads with two pads. If you open the footprint in the editor and play it for a while you can see that for example pad 1 is already composed of several pads.
In KiCad symbol and footprint are completely separate entities. Pin numbers must always match between the symbol and the footprint. If not, you have to change either one. My footprint is made with 1/2 and 3/4 for the big pads because it keeps the datasheet numbering. You could as well modify only the symbol if you want to. There are several possibilities. Tell us which one you choose and we can help you to make it.
I fixed up the pads (dimensions were slightly wrong), and added a zone around (pads 1 and 2) and (pads 3 and 4). I can route signals to the pads/zones.
The next picture shows how I set up the zone for pins 1 and 2. I played around with the settings and decided clearance should be zero and I want solid connections instead of thermals. But on DRC I get Copper areas intersect or are too close for the 2 zones being too close to each other, and I can’t figure out how to change that DRC setting. I got around the pad-to-pad DRC by setting the limit to .0001 mil, because if you set it to zero it uses the defaults.
Good thought, wrong conclusion.
The “clearance” is for clearance to other things. As soon as you set Pad connections to Solid there are no thermal spokes and the connection to pads is well, “solid”.
You do apparently not have much experience with this. Experiment a bit with these settings on a much bigger zone on a practice board to get a better idea of what KiCad does with these settings.
You can also make the zones around the pads much bigger, so they also overlap with the pad that is now connected to some other off screen pad. that way you do not have to draw tracks to these pads at all.
Another thing:
I have not studied the datasheet carefully, but it looks like there is a thick exposed copper on the underside of the package that connects +5V with LED_POWER, and from what I know of the allegro current sensors, they have a galvanic isolated HALL sensor in the rest of the chip. This means the sensor is sensitive to the distance between the current through the copper and the HALL sensor. It is probably a good idea to make a “keepout zone” under the IC to make sure there is never any copper of any net under the “sense wire”. Not only for HALL accuracy, but also against accidental shorts.
I think zones are not what you should use here. What for zones?
I form one pad from many pads if I need some special shape, but then I give all of them the same number. But here you need a simple rectangle so you can just use one pad. Why two pad in one pad?
Do you have also at schematic pads 1 and 2 and do you have connected them at schematic. I don’t know where from are those red arrows - so I suppose that may be KiCad thinks pads 1 and 2 need not be connected but it sees they are connected.
Piotr, you made a good point. I made one big pad and called it 1&2 and another one called 3&4, and did the same with the schematic symbol. It’s simpler and makes more sense this way. The board is off being built fabbed and assembled. Thanks.
Paul, thanks for explaining what clearance means in this context.
@rodneyisom can you post a picture of your symbol and footprint, please? I have this in my design but haven’t made the PCB as yet. I had essentially the same question on a different thread.
Harjit, here are my footprint and symbol. Don’t make the same mistake I did - put a routing keepout under the current sensor! I was warned to do make keepouts on both layers, and somehow I missed it. The traces that pass under are low-current in my case, but it was a dumb mistake to make. Good luck,
Lloyd
