Bus Wires Across Hierarchical Sheets Showing Not Connected

[lightpunster]

I know there are a few other posts like this, but I can’t seem to find anything with this exact issue.

A project that has been clean of ERC errors for a while recently started throwing an error for almost every bus connection. I have not updated KiCAD recently and am currently on 6.0 running on Windows 11. I’ve created a sample project to demonstrate the types of issues.

I have a bus connected across a hierarchical sheet.

• Wires A & B on the bus have a No-connect in the root sheet but are connected to another component inside the sheet, and they throw no ERC errors.
• Wires A & B on the bus have a No-connect in the root sheet but are connected to another component inside the sheet, and they throw no ERC errors
• Wires C & D are connected to something in the root sheet. They throw 2 ERC errors each, as though KiCAD is not recognizing that the two ends of the wire should be connected.
• Wires E & F have no connect flags in the root sheet. They throw 1 ERC error each inside the hierarchical sheet.

When I switch to the PCB editor, all the connections are made correctly.

Is something wrong with my bus labelling? Or does this seem like an ERC bug?

[mf_ibfeew]

nice pictures, but could you attach the zipped project archive?

And which 6.0.x version do you use exactly? (there were some bugfixes regarding bus-behaviour on some subversions)

[lightpunster]

6.0.9

HierarchyBusTest.zip (43.2 KB)

[mf_ibfeew]

Is something wrong with my bus labelling? Or does this seem like an ERC bug?

So many questions: No, yes.

With your project and the delivered version I would say that sounds like bugreport ERC "Label not connected to anything" in basic bus usage (#12814) · Issues · KiCad / KiCad Source Code / kicad · GitLab.

Try to update to version v6.0.11 (requires no change in setup, library-path or other things).