Namaskara,
Here is an example scenario:
USB has 2 pins (DATA, CLK) this is define in Bus Alias definition. Meaning where ever I use USB i should get 2 unfolding DATA AND CLK.
say in C++ its like
class USB
{
int DATA;
int CLK;
}
Now in my micro controller I have 3 usb ports.
So I will label the bus USB1{USB}, USB2{USB}, USB3{USB}
in latest KiCad (9.0) ..I get perfect unfolding … USB1.DATA, USB1.CLK.
That is amazing and leads to error eliminated PCBs.
Now In addition to USB … I have 2 other lines for which I create ANOTHER bus alias
say DISPLAY (Reset, Command)
class DISPLAY
{
int Command;
int Reset;
}
so Display1.Display → Reset and Command unfolding.
this is also perfect.
buy my OLED display has USB INTERFACE FOR COMMUNICATION AND Display for control
so OLED →(USB1 DISPLAY1)
class OLED
{
USB usb1;
DISPLAY display1;
}
This i connect to OLED there I should have unfolding of OLED.USB1.DATA OLED.USB1.CLK OLED.DISPLAY1.RESET, OLED.DISPLAY1.COMMAND
this will ensure 100% accurate PCB.
Currently in Kicad, while I can individually connect bus to OLED.
Its highly preferable I can stitch USB1 AND DISPLAY1 to derive OLED and then unfold OLED.
Currently that is not possible. I tried many perm and combination, its not unfolding in the second level.
I get OLED.USB1 but not OLED.USB1.DATA.
I searched for help everywhere, but this feature (if currently available) has not been explained ..or its to be implemented. i.e→ recursive bus unfolding.
Please, if its not implemented, can I it be done?
Regards
Rathnadhar K V
(C++ example is for illustrative purpose only}