Not sure if this is the correct place to report bugs. I have encountered this problem twice, the GND connection not correctly connected but the DRC does not report it. Please see the attached photo. One photo shows unconnected net correctly checked, and second photo shows unconnected GND ball not correcly checked.
I am using version 5.1.6, I also had this problem on different board using version 5.0.1.
DRC showed all the unconnected nets correctly except the unconnected GND ball as shown in the second photo.
BTW, I found the unconnected GND pin/ball after I sent out my layout to PCB manufacturer since I ran DRC without any error and unconnected net so I sent them out!
The G8 type I set it to “input”. But does that matter?
“You have to make two kinds of checks, DRC and check unconnected pins that does exactly that.”
I don’t quite understand this! The DRC reports “Problems” and “Unconnected Items” at the same time. Is there another “unconnected net check” function anywhere?
At least in theory the ratsnest lines and the DRC report should show the same unconnected items. AFAIK the ratsest lines have sometimes in history been less reliable. In any case the lines are only visual and may easily go undetected in inspection, so the DRC check is authoritative. If some unconnected item isn’t detected by the DRC it’s a very serious bug, potentially leading to big financial loss.
It must be repeatable, so in this case you have to attach an example file unless you can give step to step instructions how to create it from scratch. If you are allowed to attach the file or create a new one with the same problem, you could give it us here as well, so we could check if there’s something else going on.
I am doing another layout now and surprisingly I am finding another GNDREF that is left floating but DRC does not detect it as unconneted while other unconnected GNDREF pins are detected as unconnected. I am too lazy to take a picture but just let you know that KiCad has serious problem in detecting unconnected GND connection.
I will post my files and let you guys know where to get them. Will do it in a day or two.
What does the “highlight net” function do?
Both in Eeschema and in Pcbnew?
If there is any possibility of a typo in net labels, then the easiest way to fix it is to delete the (possible) offending label in Eeschema, then copy a good one to the old location.
Indeed. local labels on a sub sheet is another way in which things like these can happen.
No, please do not do this yet.
There are different ways in which this may appear to be a bug, but actually is not.
What is your experience level with KiCad?
A PCB with such BGA’s is likely to be divided over multiple schematic sheets, and incorrect use of local / global and hierarchical labels is for example also a good possibility.
In my opinion it is a good idea to try to make the workload for the developers lower, by first verifying possible bugs are actually bugs before reporting on gitlab.
Hi Guys, After digging out for a short while, I found the reason, it is actually not a bug, it is because the upper copper fill zone to connect the unconnected ball and the via. Please see the photos