Hello, this is my first post so forgive me if I make any mistakes. I am decently familiar with the basics of Kicad and up until this point have not really hard to worry about clearance issues (Large pitch parts, low current traces, relatively large PCB edge cuts) until now… In a new design I have a small BGA part (54 ball, 0.4 mm pitch) that I need to fan out. I’ve been going back and forth with a manufacturer and I need to ensure a 5mil (0.127 mm) distance between my vias and the BGA pads. I’m sure this is basic in the design rules settings but which clearance rule is this? Solder mask clearance??
0.4mm pitch oO you might need to look into Via-In-Pad
if you were to dogbone via’s from the balls’ you are looking at less than 0.1mm drill (ie uVia done via lazer) to realise an annular ring diameter around 0.12
at 0.1mm drillbit (if doable…) the thickness of the board will be limited to <1mm to keep the aspect ratio
In KiCad you normally set the clearance in the design rules: Pcbnew / File / Board Setup / Design Rules / Net Classes You make some Net Classes, set their properties, and then put all the nets in their appropriate net class.
The clearance there is used for everything. Pads from footprints inherent the clearance value from the net, and therefore net class that the pad is assigned to. It is possible to overrule this default behavior by setting a clearance value for the pad itself.
Solder Mask clearance is for the size of the cutout in the solder mask, relative to the pad that the solder mask belongs to. I has nothing to do with clearances to other items.
With a pitch of 0.4mm, the pads get quite close together, and techniques like Via-In-Pad may become necessary. Via-In-Pad is not jut placing via’s inside pad, but it is a specific technique in which you place the via’s in the pads, and your PCB manufacturer fills the via to prevent it from wicking up the fixed and very limited amount of solder from your BGA pins.