Best way to automatically generate schematics (.sch files)

Hello everyone,

I was looking for an open source analogue filter design tool. What I’ve found didn’t impressed me much so I thought maybe I just write a little script in Python for calculating passive Butterworth filters. [As a side note, if you could recommend a particular filter calculator - please do so.]

Since I have to output result in the form of schematic anyway, why not to generate .sch file? In this case I don’t have to worry about any GUIs and the end user can run an ngspice simulation of the filter in KiCad.

Unfortunately I didn’t find any existing libraries for generating .sch files. SKIDL looks almost like something I want, but it generates only netlists. As I understand currently there is no way to import a netlist to the schematic somehow.

Format of .sch files doesn’t look too complicated. I think I could write a library in Python that allows to build .sch files. Or maybe I missed something and there is such a library already (or a script that imports netlists)? What do you think on all this?

Take a look in the scipy package. It has both analog & digital filtering capabilities. However, not sure if it will dump out the component values of a circuit. But this Butterworth filter design library does.

If you want to design a filter and simulate it, that can be done with SKiDL and its interface with ngspice. It’s just a matter of taking the output of your filter program, constructing the circuit in Python using the SKiDL library, and then executing it to run the ngspice simulation. The SKiDL code could then generate the netlist for import nto PCBNEW.

As for converting the netlist into a schematic, that’s tough. Generating the .sch file is easy, but deciding where to place the components and wires so it is understandable once you look at it is very hard. There’s a little code in SKiDL to do this using graphviz, but it wasn’t taken very far. There’s also netlistsvg which creates a schematic from JSON, but it’s primarily oriented toward digital circuits. Maybe there’s a way to do this using commonly-accepted drafting rules and a constraint solver. Since I don’t use schematics any more, I haven’t had much motivation to solve this problem.

1 Like

For the record - I discovered Qucs software, which turned out to be exactly what I was looking for.

This topic was automatically closed 90 days after the last reply. New replies are no longer allowed.