Best practice for managing parallel output pins in a component?

A common ERC error seems to be “Pins of type Output and Output are connected”. Common enough, at least, that a recommended solution for this problem is to “give only one of these pins the type output,” or to stack the pins all on top of each other with only one of them visible. How do you do that when the two output pins in conflict are in two different components? I have 2 IR receivers in parallel to detect IR light from any direction, and their output pins have to be on the same wire. Do I modify the symbol setting for the output pin on one of the components to invisible, and save it in a project-specific library? Or is this a special case where ERC should just be ignored? Schematic, errors, and IR receiver symbol properties shown in screenshot.

I think these pins would more properly be called open-collector, despite having internal pull-ups.

Does that make a difference for ERC? That is, is there some designation I can give them to avoid the error?

Edit: Oops! I see the electrical type in the pin properties. I’ll give that a try.

Yep, that seems to have cleared the output error. I’m not sure why I’m still getting the “Input Power pin not driven by any Output Power pins,” though. I thought the two errors were connected.

You are missing PWR_FLAG symbols on your power nets. See Schematic Editor | 6.0 | English | Documentation | KiCad for details.

I have them. On the schematic above, there’s a PWR_FLAG attached to the +5V and a PWR_FLAG attached to GND. They’re just below the component I asked about.

There is no PWR_FLAG on the power net going to those ICs, though, because of the 100-ohm resistor splitting the net.

Oh! I didn’t realize that affected it. Thank you!

Yup. KiCad cannot analyze your circuit for you and know that placing a 100-ohm resistor in series will still result in those devices being powered, so the PWR_FLAG is just a way of telling KiCad that you have done that analysis and you’re OK with it.

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That makes perfect sense. Thanks for taking the time to explain!

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Yes, this seems to be a common misconception about KiCad’s ERC, that it does circuit analysis. It just checks compatibility between pin types on each net.

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Apart from a misconception, I also find it a quite logical expectation. I once had the idea (and communicated it on gitlab) to have a possibility to add attributes to parts to tell ERC to treat them as shorts.

Especially when parts such as rectifying diodes, fuses, ferrite cores, low value filter resistors, etc, are used, the schematic becomes cluttered with PWR_FLAG symbols, and I find it quite understanding it annoys people. There must be a better way to do this.

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In my case it is only temporarily.

I treat the ERC as a way of finding stupid drawing mistakes.
My workflow is:
Draw the schematic then double check.
When happy with the result, place Pwr. Flags wherever needed (the act of which sometimes find those stupid mistakes).
Run ERC.
Fix any missed stupid mistakes and ignore, after checking, any not needed warnings.
Finally, remove all the Pwr. Flags.

As Retiredfeline states, ERC is really just a drawing check, not a design check.

Meh. If it bothers one, one could put all the PWR_FLAGs in a corner of the schematic connected to the power rails by labels. Maybe along with the rail decoupling capacitors. As you could do with the mounting holes and logo symbols.

The mounting holes must be equidistantly spaced in a straight line atop the logo, itself just above the title block.
Decoupling caps. always with their ICs. and flags banished… then Meh, also. I’m not bothered.
No OCD here :woozy_face:

I pretended that I had OCD (or maybe I’m not pretending) and edited the text size of a PWR_FLAG. I could make it as small as I wanted. I could even turn off visibility, leaving only the diamond which remains full size though.

Too simple :slight_smile:
If I want to switch on low current consuming circuit I directly power it from microcontroller pin.

In my circuits I connect to VCC only microcontroller itself. All other ICs are powered through ferrite beads.
How many discussions would not have a place if power input pins would be market as passive.
Our (me + my brother) experience is that if the topic comes and goes many times than what you have to do is at least do something to stop it comes around.

I think KiCad should understand fully what can be done with power supply (including supply from output pin) or (much simpler solution) all power inputs should be passive.
If there will be no power input pins I expect much less power supply mistakes made by beginners than questions about PWR_FLAG asked here.

Fortunately, as you probably remember, I don’t run ERC :slight_smile:
All in all, there is not much difference between analyzing power supply to put needed PWR_FLAGs and analyzing power supply to be sure it is done correctly but schematic is more beautiful in the second case.

To do that you have to name many nets normally not named at schematic.

In your case yes, but I usually have only a few power rails that need a PWR_FLAG, and most of them already have a label like GND, +5V, and so forth…

Of course one could just turn off that particular rule in ERC and leave the others on. That could be the heretical alternative advice to that common newbie question.

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