You misinterpret the intention of such scripts.
The intention is not to have something resembling a usable PCB layout.
The only purpose for such scripts, is that parts that are close together on the schematic are also close to each other the first time you port them to Pcbnew.
This means the ratsnest mess in the beginning is a lot less, and it lets you easily draw a box around the “5-pole-filter-parts” to start the PCB layout.
It also gives a visual clue of what the parts are, because you know the schematic you designed intimately, and the parts on the PCB are at comparable locations.
So I repeat:
It is NOT the intention to use this for the PCB layout itself.
Just consider that schematics are drawn for readability, so parts are far apart. PCB area costs money, so compact PCB’s are preferred, and PCB’s have lots of other constraints such as parametric capacitance, stringent placement for decoupling capacitors and much more.
It’s just an aid to start with something recognizable.
It is better then just dumping all the parts together on the PCB.
(Ah, those days where all parts in Pcbnew had the same location, so stacked on top of each other on the first import…)
(Spelling correction wants to make a rattlesnake out of my ratsnest)
On the other hand, I once tried to design a board with several repeated sections which were connected to other repeated sections. The sections were very difficult to place in the pcb, along with the connections. I decided to redraw the schematic resembling the final positions of the sections. After that it was about million times easier to create the layout. But I had to move the sections (hierarchical sheets) manually first which was frustrating. It would have been much easier to get started with the layout if the sections and footprints would have been positioned according to the schematic (which was the purpose of redoing the schematic in the first place).
Well, the sheet boxes are positioned in the schematic, so they could be followed at least in some cases. Inside each sheet the footprints would of course be positioned according to the schematic.
I think we are saying the same thing, but from different perspectives. the Macro placement w.r.t. eeschema would work and hopefully comes when something like altium’s rooms are incorporated (but heirachical sheets already permit initial placements grouped by sheet).
The reason I was holding this stance is there is a script that does placement just like eeschema, it was advertised here and queried about a few times
Quite happy, having created this topic, to read so many and very interesting constructive exchanges.
That will help for sure the community, dealing with more or less same expectations from different industry domains --!)
Capabilities could be extended depending the orientations and effort within the different priorities
whether already possible or expected ones.
Different solutions would be or could always become a reality for the ‘steps beyond’ the existing ones,
or which could be considered as a ‘nice to have’.
Thanks @Paul for your subjection.
We indeed have tried naturally the Auto-placement, upon some others,
by exploring capabilities (embbeded or not),
and offered or not (or differently) in other ECAD ones.
The V6 seems to concentrate the efforts on important expected matters which are nice, such as auto-routing among some others.
In this way, an ‘optimized placement’ could help, while spending less effort to route.
As more or less said,
When the rastnet is not ‘organized before’ in parralell of the schema capture
that should anticipate the ‘step-after’ (even if not its primary objective, among some others…).
a ‘much effort’ will be spent to route, and obviously whith globally less efficiency…
One can also observe the same on less complex design (no to say even on some basic kinds),
delegated to less experienced co-teams for them to improve their different skills,
and with some astonishing unexpected results or blocking points. But this is an other story --!
The challenge is informing the placer about critical nets and importantly critical parts of nets eg Vdd power decoupling. KiCad schematic does not have this concept yet
KiCad is open. and could be customized for different users having different needs.
We generate an ‘extended-BOM’ (XL database easily shared and readable by all as a reference input).
with recomm’s to be taken into account for the routing.
Dedicated Fields with specific keycodes could be imagined for an external python process by giving inputs to it (such as top, bottom or dont’ care, parts to be grouped, or generating the NetClasses for pcbnew).
What do you mean David, by the 'a Concept’ that KiCad does not integrate ?
Is there some ECAD proposing a better approach (by having some capabilities that KiCad would not offer yet) ?
Altium, Eagle, Mentor Dx/Exp, Pads, Cadence Allegro Orcad, Zuken… : have they a better, same or different approach ?
Presently KiCad V5/V4 have ‘some pre-placement capabilities’ but not sufficiant enough to avoid this (boring but necessary) placement phase but ‘done manually’ to start the ‘real routing’.
Some external python scripts would do at less effort… but haven’t seen any
What could/should be an efficient way which would be better, while satisfying such expectations ?
No sure V6 will introduce those matters … ?
A 'Better to be re-inforced automatic pre-placement’ (including: parts positions, regrouping, fanout, Net-Classes, power planes and pcb stackup) would help both Routers and Designers, for such repetitive tasks being done when starting a PCB. A machine can do the same much quicker, by taking into account rules (or expressed as wishes or working day-by-day closely with the router) that could be indicated and generated by Design Team in the ECAD during the schema capture, not just before starting the routing…
For my DIY projects, the freerouting auto-router will be even more efficient (A good placement gives fast routing, just to finish the last details manually for an acceptable nice finished PCB … !),
I’m limiting manual routing (so far necessary) to the critical nets and parts. Most of the time it is fully sufficiant (but spending much on the time on the manual parts placement !).
I’m already doing this by using the extended-BOM generated automatically. I’m using presently KiBOM, but the KiCad default one is sufficiant (including or not external libraries from distibutors for KiCad, but stay the same, just additionnal different fields being introduced). Presently done manually (but foreseen to be automated also when adding a part during schema capture, from the libraries…should be probably possible including those fileds as some extentions of the default KiCad’s ones, just get some time to look at it…). The step-beyond will be to develop some ‘python scripts’ to accelerate the pre-placement phase as I experimented different placements to get different freerouting quick and satisfying results, finished manually et Voilà! for PCB manufacturing for the ‘next phase’…
While expecting V6 would improve such capabilities for KiCad ‘H/W users’…
If somebody has some description of the ‘alogrithm used’ in KiCad V5 for these pre-placement capabilities or where to find it.
That could help to have some ideas when structuring the schema, having experimented different types of schemas and observe the pre-placement, poor results… But perhaps I’m still not using a good approach, not using the full embeded capabilities available in V5, or with some external plugins, that could have been already developped somewhere …???
If somebody has some of these …would be quicker for me rather than to develop it (even if it could be some fun for me to do it during my leisure time ).
So far as I am aware V5 and V6 placement has no concept of connection, just ordering on a sheet page.
To make a helpful placer, it would need to be aware of net “weighting” and proximity of decouplers. The latter really need to be in a table, drawing it gets clumsy.
A long time ago I used to use Xilinx 3000 fitting tools, using a schematic input rather than VHDL. This had the concept of net weighting and ran a genetic annealing algorithm to fit. It was a much simpler task than a PCB due to the limited function and interconnection options.
What should be simple and useful would be a simple total of ratsnest length, so that I can try rotating and moving chips to see what minimizes it
Structuring schema by blocks, normally decreases the problems … (both for humans and for some clear s/w processes that could be applied for each problem to be solved separately and one at a time, decoupling the efforts block per blocks…).
it gives an idea of what could be expected from a “2-layers hierarchical schema” (Lev-1 top layer + Lev-2 sub-layer(s)).
As it could be observed in KiCad V5, the parts of each Lev-2 pages are well regrouped separately block by block (when importing the netlist in pcbnew).
With the same relative positions and with its different part ref. belonging to a block.
That’s fine. Selecting and Moving those blocks in pcbnew is an ‘other story’, while expecting to be improved in V6 (Comparing V4&V5 to other ECAD’s, competitors are still better… )
Seeing the V5 placement result, one could deduce ‘net weigths’ not considered at all (would have been different if it were the case…).
It should be needed then to apply additional different treatments apart the V5 one.
for example, counting and computing all net lengthes between pin’s parts to position until an ‘average *weigth within the group would be minimal within each groups’… * It would give probably some good results, at the effort of some affordable python scripts to be launched from eeschema console…
A good s/w programming ‘python exercice’ for master degree students (among some others interesting exercices) … Have we s/w students interested in developping for fun some kind of mokeup ?
Route and optimise only one (of each different groups) and apply ‘layout cloner utility’ to the other untouched ones, then finish the remaining details… Watch some Web tutos explaining this utility.
Could become a bunch of separate dedicated recipies (which could be sequenced automatically step-by-step, calling or not, each of them when necessary…).
With a ‘3-layers schema’ example, it reveals some bad surprise: the ‘netlist import’ seems to be limited to ‘Top+2nd layer’, Lev-3 being not considered and then not grouped where the parts should belong to … Probably will be the same for more than 3-layers (but not yet tried…).
For my DIY leisure time projects, I’m structuring schema a hierarchical way, trying to limit hierarchy up to 4-layers, sufficiant as not tremendous design… (from profesionnal experience could be not sufficiant on heavy designs…).
being the weakest point and time-consuming critical transition…
‘just to include’ the optimum necessary ones for a machine to make the part pre-placement job an easier way,
so as to accelerate this transition phase.
Focussed only on short rastnets, parts positionning and orientions, parts fanout and also power planes.
Bad placement introducing additional problems conducting to a bad or impossible routing
able to be used by DIY makers or OHW communities using KiCad.
In another thread @maui linked to the OpenROAD project. It has some kind of an autoplacer: https://github.com/The-OpenROAD-Project/SA-PCB. I wonder how it can be used, how it works and what kind of results it gives.
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(among some others interesting exercices) … Have we s/w students interested in developping for fun some kind of mokeup ?