Assigning a netclass to a net and persisting that change in pcbnew using Python

Hello all,

I’m working with the PCB editor in KiCad version: 8.0.4-8.0.4-0~ubuntu22.04.1, release build. I’m trying to create and assign a netclass to nets and then run some DRC checks, but then netclass assignments do not seem to persist and revert back to their default. Here’s an example that can be run in the scripting console:

import pcbnew
pcb = pcbnew.GetBoard()
nets = pcb.GetNetsByName()
netclasses = pcb.GetNetClasses()

net = nets["mynet"]
netclass = netclasses["myclass"]

net.SetNetClass(netclass)

These commands appear to successfully assign the net to the netclass. This can be verified by clicking on any item in the net on the PCB editor and checking in the status bar at the bottom that “Resolved Netclass” is correct. However, it does not persist when saving, and more importantly in my case, if I then run the DRC checker, it resets all the nets back to their default classes. This is also the case when the file is saved, or if I run pcbnew.Refresh().

How can I resolve this?

I do not know much about scripting i the PCB editor, and can’t comment on that part.

The PCB editor in KiCad has never worked well without a schematic and the netlist it creates. Netclasses are also usually created and nets assigned to them in the schematic.

I am not sure what your overall workflow looks like, but apparently you are working without a schematic. Maybe you can do something with SKiDL. SKiDL is a python library with which you can create nets, parts, assign footprints etc, and it is intended for scripts that run outside of KiCad. It is a sort of VHDL equivalent as a replacement for drawing a schematic. It is also an old project. I am not sure whether it is still being maintained and works with KiCad V8.

as a SKiDL user I can confirm that it works with v8

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Thanks for your reply,

I am not sure what your overall workflow looks like, but apparently you are working without a schematic.

Correct. I’m examining PCB designs created by other programs (e.g. Altium), so I’m provided with the PCB file and I’m importing them into the KiCad PCB editor and doing various analyses on them without the schematic.

Creating netclasses works just fine using Python and these persist no problem. It’s the assignment of nets to classes that is problematic, being overridden somehow whenever some other function is called (e.g. saving the board, running DRC).

There are subtle details here of which I do not know much. When you create a new netclass in the schematic, it’s visible immediately in the PCB editor. But when you create new nets, updating to the PCB is only done after KiCad is told to do so with [F8].

Are you interested in re-creating the schematic too?
KiCad still has some gaps in it’s functionality when used for reverse-engineering tasks.
You can create nets in the PCB editor, and then push them back to the schematic (it creates local labels connected directly to pins).
You can also push footprint assignments back to the schematic, but you can’t directly attach schematic symbols to footprints in the PCB editor.

I did a bit (not much) of reverse-engineering myself, and a sort of hybrid workflow seems to work best. You build up the schematic and the PCB at the same time, and push information back to the schematic quickly and often. A big monitor (Mine is 107cm 4k) or dual monitor setup is a big plus here.

With a schematic, you can also check whether connections you see on the PCB do make sense. This helps to catch silly mistakes. Humans always make silly mistakes, and a workflow that exposes them is always a bonus.

Assigning nets to net classes is not a very interesting step. Getting the connectivity right is much more important. When that works, assigning nets into net classes is a quite small step.

As a bonus: you can use coloring both for nets (in the schematic) and tracks (on the PCB) based on net classes. This can help with reverse engineering, for example change the netclass once connectivity of a certain net is verified.

I re-read your comment and it changed my approach to the problem. Instead of focusing on pcbnew, after further searching I found that the net/netclass assignments are stored in the .kicad_pro project file under the netclass_assignments and netclass_patterns entries. It was then a simple matter to modify the JSON to assign the nets to netclasses how I wish. This resolves my problem nicely.

For reference, you can still create the netclasses in Python just fine.

Thanks for taking the time to discuss this.

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