And there isn’t any restriction to use a local label to name a power net into a hierarchical sheet. The difference is only aesthetic.
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Well, I found that of course. That is easy. But it is only the top level starting point to all of help. I was referring specifically to “…the documentation for power symbols…”. there wasn’t any topic I could find that explained how this works.
Given all the confusion around this topic and how many people are struggling with it, I find something like a ‘Getting started with power symbols’ write up, perhaps right in the getting started with KiCAD guide would be a welcome thing.
Directly from the Schematic editor documentation. I don’t know what you would need to make it any clearer.
Power Symbols
Power symbols are symbols that are conventionally used to represent a connection to a power net, such as
VCCorGND. In addition to being a visual indicator that the attached net is a power rail, power symbols make global connections: two power symbols with the same pin name connect to each other anywhere in the schematic, regardless of sheet.
Hi Jon
And that’s fine. I’ve never used Altium strict hierarchy, nor do I use flat.
In fact, from my very strict and disclipined POV, there is only one type I use- Normal Hierarchy. (net names are local, power symbols global). It enforces structured connectivity for nets.
I know that many ops prefer the simple life and flat suits them. For me that potentially leads to unconnected objects (nets that I forgot to connect that would otherwise generate an ERC error because they lacked a explicit connection to another sheet) .
Exactly. That was clear going in. As you see, it explains none of the the things we are discussing here and I was seeking answers for.
What I mean by documentation for this topic is not just stating the obvious, but explaining how to actually go about defining a power symbol correctly, so that it
- generates the nets I am expecting it to
- works smoothly with ERC
- anything else I might not be aware of
None of that I can find in the documentation.
Does this help?
There’s a step by step guide on how to create a power symbol in the schematic editor documentation. The title of the section is “Creating a Power Symbol”.
If you have specific questions after reading that section please ask them.
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None of that I can find in the documentation
As your questions mostly targets the internals/creation of power symbols I would recommend the chapter about the library editor, section " Creating Power Symbols". All information answered in this thread could also be found in the documentation, so it’s only a matter of reading all information. Admittedly this might be boring, because it’s much information.
As you said you have experience with eagle:
handle power symbols in kicad like supply symbols in eagle. Copy existing power symbols, rename the internal pinname for the name of the power-net.
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@mf_ibfeew @gkeeth yes, that is what I was looking for. It didn’t enter my mind looking under the schematic editor, as this is about defining symbols. But anyway this seems to have all I was looking for. Including the other weird thing I found, which is that the pins seemed to be all defined invisible. I couldn’t figure why that was done but had a suspicion that was part of the special conventions about power symbols. This must be the place I saw mentioned some place but failed to locate.
Strange that all sorts of searches inside the info website and google searches did not find this place. Sometimes it really comes down to using just the right search term(s).
Thanks a lot!
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One last comment to add. So the section under the schematic editor “Creating Power Symbols” appears to contain all the gory details, which is exactly what I was looking for. It also suggests, as some commenters here have as well, to start by copying an existing power symbol.
This is of course what I did, and probably what most people would do naturally, for simplicity sake. The problem here is that if one does that with a power symbol library that did not originally come with KiCAD (as in my case) and that library or any particular symbol in it one happens to copy contains a mistake, that problem is perpetuated. Not having originally defined the symbols and thus lacking understanding of the details, one is quite helpless in fixing any problems that crop up as a result.
Personally I prefer understanding these things in depth.
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Gosh, I thought that was obvious. 
That may have been a small part of the problem, but I’m guessing that a bigger part is:
It takes some time to get get to know (and work efficiently) with any program with the complexity of KiCad. And when you combine that with time pressure to “get things done” you have a recipe for frustration. With a bit more experience with KiCad it’s easy to spot such problems, and then either:
- Fix those non-custom symbols.
- Use: Schematic Editor / Tools / Edit Symbol Library Links to replace the “defective” power symbols with symbols from the default library.
- Add some PWR_FLAG symbols in the right locations.
(Or a combination of the above).
I hope (expect) you KiCad experience will become more pleasant for you too when you’ve gained some more experience.
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Sorry, thanks for the prompt. I removed my comment. It was unfair. I had only read comments from the last 24 hours.
Yep. As I wrote somewhere in this thread, I am in the process of fixing all that -as time permits- but I am doing quite well actually. Monday is again ‘power symbol day’. With the correct information at my fingertips I am sure it’s fixed in less than an hour.
About the rest: to be honest, KiCAD is a much more pleasant experience than any of the other EDA tools I have used. I am sure I will grow to love it.
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In 80s-90s there were popular symbols (specially TTL gates) having power pins hidden. Even now rather not used KiCad allows for such definitions. I suppose that power symbols take something from such symbols but having only the power pin alone. In those symbols the name (like 7400) has nothing to net used by its power pins. So when using this to define power symbol it looks that pin net definition is hidden as changing the symbol name don’t change net.
From what I have read (but not checked) in V8 the power symbols will work little easier. You will be able to place at schematic for example VCC power symbol and rename it to any other name and it will be connected to this new net (now after such modification it is still connected to VCC).
I think the hidden power symbols came from a time where there was one voltage rail on the whole board + 5V.
It’s a good idea to have all that visible, - why ? because you can place next to that power pin on schematic (or , indeed attach to that pin) a bypass cap, so that this explicitly reminds you or the layout person that this cap needs to go on the chip.
You may be right about the situation about only having 5V on the board. Though I have to say I designed boards in the mid 80ies and ever since. I never had such a board. I suppose it depends on the industry you work in. I always worked with mixed signals and thus always had at least two voltages on my boards, typically more.
I can appreciate the aspect of trying to hide away the power pins. They seriously tend to get in the way of conveying the essence of a circuit and add no information of their own. I typically add an extra gate to each chip whose sole purpose is to hold all the power pins. These gates get shoved into a corner (or more typically the bottom) of the schematic and connected to the appropriate supply rails. The bypass caps get then placed next to those gates as you describe. I feel this gets the supply situation taken care of in a neat way and keeps it out of the way of the actual function of the circuit.
In 80s I have designed a TTL frequency counter (for my own use). I have there (it is still working) 3 PCBs having only 5V at them and separate (shielded) input amplifier to allow input up to 100MHz (it was very high frequency for me those time) powered from different voltages.
Those times I have also designed analog oscilloscope (it was the only way for me to have the oscilloscope) and among other PCBs it had a time base trigger system whole made based on TTL ICs. This one PCB there also had only 5V on board.
First serious money I earned being a student (equal to my dad’s two month salary) was for doing chronocomparator (you put electronic watch at its table and it shows how accurate its clock is). It was whole (or at least most) powered from 5V - it was also based on TTL.
All digital those time was powered from 5V so I think in all only (or mainly) digital devices having only 5V at boards was popular.
Cool projects. Sounds like a lot of fun. TTL wasn’t much of a thing anymore in the 80s, but that might depend on the place you worked at. I worked with that stuff in the 70s. In the 80s I worked in the medical device industry. As I wrote, my projects there were mostly mixed signal and I used Motorola 4000 logic a lot, running on 15V and analog circuitry on +/- 15V. Embedded computers were running on 5V (80186 based), so the interface logic was 5V.
Nah TTL never died. It just went CMOS, begatting HC and HCT families but the multi-emitter input is no more. With the single gate variants it’s still used in glue logic. But the 5V supply rail is fading. Even 3.3V is getting long in the tooth.
Back in the 70s, logic chips were mostly very simple and many circuits became a real rats nest. Tracing the connections was bad enough without power wires all over the schematic. Fortunately those days are gone.