I’m working on a single sided board, and needing to jump my power and ground connections through some 0 ohm resistors.
The obvious solution of just using resistors and having a bunch of separate ground nets on the schematic is pretty bad, I think, as they’re all the same logical ground. There’s no separation in their function, so my schematic shouldn’t show one.
Is there a good way to tell it that 2 pads of a component are connected, and part of the same net?
It’s something I run into occasionally, even on 2 sided boards. (TO packages with tabs connected to pin 2, etc. (but a space between the pad and tab on the footprint)
I’ve always been able to hack around it one way or another, but the more complex the board, the more messy this gets, placing a bunch of extra nets on my schematic. (Physical layout taking over the logical schematic, tons of do-nothing parts making it hard to see what’s actually happening)
Is there some solution? Either a way for a jumper to be created that DRC understands, or a way of explicitly telling the PCB layout that there’s a connection between physically separate pads on the same net?
Since you are going single sided, unless you need to indicate on the schematic where the jumpers are, don’t bother. During layout put your jumpers as short copper segments on the top layer (component side). Just make sure you don’t accidentally run these top-side traces under components, nor have wild and crazy geometries. Try to keep them to straight runs. Then for building, the top copper layer printout will be your guide for how to run your wire jumpers.
Oh, don’t forget to make your vias large enough to be a solderable hole for what ever gauge wire you plan on using to make the jumpers.
Is a net-tie not the opposite of what I’m trying to do?
What I want to do is tell the PCB editor that 2 physically separate traccs are part of the same net and are connected, even though there’s no trace.
“this chunk of ground plane, and that one are both connected, even though there’s no pcb trace connecting them”
a net tie is for saying “This GND net is allowed to be connected to this AGND net by this trace”, right?
My problem is that I have one ground net on my schematic which connects to a bunch of different parts.
On the board, it’s not routable without wire jumpers (actually 0 ohm resistors).
To make this work on the schematic, I need to disconnect all the parts from ground, and give them their own ground nets, which I connect together with 0 ohm resistors. Which parts are connected to which ground nets on the schematic is dependent on the actual PCB layout. If I change things so that 2 components are physically able to connect to the same ground net, I need to remove the jumper from the schematic, and connect them to the same net.
Doing it this way is essentially just designing on the PCB, and back-cloning the physical layout onto the schematic. (Why bother with a schematic if you’re doing that?)
Can you further explain why it would be a good idea to allow this?
A good schematic will include information about the physical construction of the design. Unless the design is actually using a 0Ω resistor, then the schematic should indicate a jumper symbol.
The GND power symbol will help declutter your schematic.
I’m actually using 0 ohm SMD resistors for the jumpers. I don’t want to drill vias to get to this imaginary back-side copper.
That is actually a logical representation of the kind of thing I’m looking for, though. It would be good to be able to draw a logical trace for the PCB DRC to be able to understand things, and not need it to be physically there.
Right. That’s what I’m getting at. I am using the +12v and GND symbols on my board. The problem is that it’s a single sided board, and there’s no possible way to route all of the GNDs together.
They will be jumping over a couple of traces via some fat 0 ohm resistors. But as the resistors are only required to make the physical connection, and are not connecting logically different nets, it doesn’t really make sense to have these physically separate (but electrically, and logically identical) nets drawn separately connected with 0r resistors on the schematic.
The design doesn’t require the resistors. They’re only required on the PCB layout, because there’s no way to physically connect them.
Which parts are connected physically, and which have to be connected via the jumpers is dependent on the PCB routing, so they can’t even be drawn on the schematic until the routing is done.
I think it makes sense having them on the schematic (either back annotated, or added and forward annotated as needed), but they should have both pins connected to GND, and not require breaking a single logical net into several whose connections are entirely dictated by the physical layout.
I can just do it that way, and it’ll “work”, but of course the rule checks are going to say things aren’t connected.
I think instead of that, you can just go ahead the layout your board. During layout, you can add addition jumper footprint as will directly on the layout. Manually assign both pads of the jumper to the same net name (GND in this case), and put it where you need the net to be bridged.
Or another way is add a bunch of jumper on the schematic with both pins of the jumper connect to the same net. Then, when you do layout, these will be a buffer jumper that you can just use them as needed. When done, just remove the remain extra jumpers on schematic, and re-sync with layout.
This should minimize DRC or ERC errors, and ras net if any should be obvious on to see that they are ok.
Yeah, this is how I will do it, but I was hoping for a way that passes DRC, instead of just ignoring the fact that my ground gets reported as broken, and shows ratlines.
I don’t think that works. I’m pretty sure I tried in the past and IIRC it’ll let you connect them both, but then complains that the pads aren’t connected until you connect them both (which defeats the purpose) I’ll give it a go when I get back to the PC, but unless something has changed since I tried last, I don’t think it works any differently than just connecting both pads of a resistor to the same net.
