It doesn’t seem that there is plans to port it to KiCad v6, so I’m wondering if anyone in the forum has any suggestion for any other plugin that might do something similar or alternatively a suggested workflow within pcbnew?
Right now I am just placing a via on the board, ensuring that “automatically update via nets” is selected, then choosing the “create array” tool and then manually deleting the vias that cause DRC errors - which is quite time consuming.
If there was a simple way of deleting vias with DRC errors, that might be a good interim solution but I haven’t seen that yet.
It’s pushed to V7. Honestly via stitching can be done fairly nicely with the tools in V6 by a Python script, the only thing missing is a way to add arbitrary properties to vias (so you can’t easily identify vias created by a plugin, except through tricks like making the via diameter slightly different).
It’s likely that we’ll first work on such underlying things (being able to give all objects properties, and being able to give arbitrary pad stacks to vias to properly support tenting control, asymmetric vias, and other things) before we work on built-in via stitching, just because those underlying things unlock more possibilities.
I might have time to look at it and port to v5.99 but was just checking nothing else already existed.
In terms of identifying vias created by a plugin: now that we have groups, the plugin could just add the vias to a group with a specific name that the plugin can then read find.
That sounds great, having a solid foundation to build upon will help the KiCAD ecosystem to grow and diversify, thanks to you and the other developers!