Analog gate simulation

That’s wrong. Please see my example Mixed Signal (Analog + Digital) Simulation at Simulation examples for KiCad/Eeschema/ngspice - #4 by holger , where besides digital signals, also analog signals are used (RC delays) to create a clock signal of certain width. The interface between analog and digital is automatically created. A KiCad 8 version may be found at https://forum.kicad.info/uploads/short-url/718yiYdfWYg0Xb3Dqox2ldgAqMQ.7z .

I am not aware of any library of digital devices made by analog circuitry (e.g. behavioral or CMOS gates). There may be some special devices where TI offers such a model (not the IBIS models though, which are only describing the interface, not the logic!). Besides digital models at https://ngspice.sourceforge.io/model-parameters/74HCxxxM.zip (adapted for footprint and symbol) and https://ngspice.sourceforge.io/model-parameters/74xx-models.7z (not yet adapted), there is another set of digital models available at KiCad-Spice-Library/Models/Digital Logic at master · kicad-spice-library/KiCad-Spice-Library · GitHub, but this again does not take any footprint or symbol node numbering into account.