I’m stumped. I imported a complex 8-layer Altium design into KiCad 9.03. I did it allowing the importer to automatically assign Altium layers to KiCad layers as well as doing the assignment manually. In both cases I ended up with a few tracks and zones assigned to In.8. It’s an 8-layer board so there is no In.8, only F and B and In.1 through In.6.
In.8 is not listed in the layer pane to the right but when I select certain traces they are in In.8 according to the status window at the bottom. Also, when I launch Zone Manager there are zones in In.8. These zones don’t appear anywhere when I cycle through the layers in the right panel and are causing DRC violations that I can’t fix.
Any ideas?
Thank you,
Brent
Postscript: I pulled the .kicad_pcb file into a text editor. In8.Cu is not listed as one of the layers at the beginning of the file but when I search for it it appears 355 times. As I drill down I can see tracks starting in existing zones and then transitioning into the non-existent In8.Cu. If I was confident that all of these should be mapped to the same layer I could just do a find and replace in the file.
As far as I know, altium makes a distinction between layers for tracks (signals?), and layers for (power) planes. But KiCad does not make that distinction. Can that be the cause?
Thanks for the quick reply. It could be, though I just finished another 6-layer Altium import on the same project and didn’t encounter the issue. A quick look using the Zone Manager revealed that all of the affected zones were power and ground. I haven’t looked at the traces yet. I may be able to dig deeper and figure out which of the several power planes the nets should be correctly assigned to.
Definitely report this as a bug. You can create an issue on Gitlab quickly via KiCad > Help > Report a bug. If you mark the issue as confidential, only the core dev team will be able to see it (and the offending Altium design).
Alternatively, if you can’t share the design as is, it would be helpful to make a copy and delete large chunks of it till you can replicate the issue without any proprietary data (and then create an issue for it).
Thanks, I will do that. I need to get this out the door so I will try to fix it by editing the kicad_pcb file (carefully). When I went through the file in detail last night I discovered that over 80% of the errors were in a ground plane zone that I’m guessing is entirely contained in a single layer and only 7 nets were affected in total.
I’ll check with my client to see if I can share the design with the team. I would say the answer is probably yes since the board contains mostly subsystems that support another board where the secret sauce resides. It would probably be of great use since I have both the source Altium file and the KiCad file converted several ways.
Well well, it may be a feature not a bug. I reimported the Altium file using the automatic layer assignment dialog. But, this time I carefully checked the layer assignment that the importer picked. It was missing a copper layer called Pwr2. I can see Pwr2 in my Altium Reader software, but it doesn’t appear in the list of Altium layers that KiCad found. It found the other 7 copper layers though and matched those just fine. Missing was In4.Cu which it couldn’t find a match for but obviously should have been Pwr2.
Somehow during the import though, KiCad found the missing copper layer and assigned it to In8.Cu. I examined the .kicad_pcb file and found that In4.Cu was only present in geometries that were present on all layers. Most, perhaps all, were just keep outs. I then did a global find and replace changing the In8.Cu fields to In4.Cu. I then opened the file by launching the pcb editor from the manager and it now appears that everything is there.
I’ll still file a bug report, but at this point I’m not sure if the bug is in KiCad or Altium.
Brent