If those 10 ratsnest lines are the last that must be done then there is plenty of room to route them.
When considering 2 versus 4 -layer PCB, the cost of the PCB is not your only concern. Two layer PCB’s take significantly more design time to do right.
Another thing I noticed is you have 8 very long adjacent tracks (Databus?) which may look good to you but is bad from an electrical viewpoint. They generate a lot of coupling between them. They sort of run in a circle: J3 -> U2 -> RN2 -> U8 -> U12 (and after going through U12: -> RN1 -> U1 -> Back to J3).
It is a lot better to spread this capacitive coupling by randomizing the order of adjacent tracks.
There is also a lot to say about component placement. For example, if you put RN2 and U8 right next to each other, then the connections between them can be just straight short tracks. It also does not make sense to run all those tracks to the East side of the PCB just to get them to U8, and then run them back all the way to the west side.
Consider for example the difference by just rotating U8 90 degrees and put it in the North-West corner just above RN2.
If possible, then also put display connector J2 in that same corner, and then your PCB will be almost free of long tracks.
The rest can be squeezed in between, but maybe move all the footprints around the center a bit easwards to make more room in the South-West corner.
Here is another thing that stands out:
If you move the single via on the S1
net Westwards, then you can remove those other 8 via’s.
Designing PCB’s is a puzzle with a pretty weird set of rules. You will get better at it if you do it more (unless you start with letting the autorouter rip. You will not get better by doing that.