What is this about?
I have checked this component in the library which says it’s “through hole”:
You have shown the pad properties dialog.
To set the component type you need to open the footprint properties dialog (doubleclick empty canvas space of the footprint).
If you don’t need this check, disable it.
The special task of this check is to ensure that only footprints with smd-pads get the “SMD”-attribute. This could be used to ensure only smd-footprints end up in the smd pick&place files.
Ok guys, thanks for your help in this, another day of learning, days of learning is the best days!… Though, it’s quite a mess in both seeing and understand WHY all those errors occur in KiCad, compared to for example Eagle. The DRC errors/checkout in KiCad takes hours while in Eagle just a few minutes with the same PCB. With the same kind of checkouts. Why? Or is it only me?
Hours? No way, not even minutes, with old lousy pieces of hw I have run KiCad on. How many errors? Can you share something, if not a project, at least a screencast of the dialog running and maybe a saved report file from the dialog?
What I mean with hours is not the time it takes to generate the error report list, that is just a few seconds, It’s more about solving all the design errors, which is because of me I who made a too dense design, and allowing the error report to report this. So, never mind
To reduce errors, you need to initially set up the design rules… This is how most cads work… Let’s say you set the maximum hole diameter in the rules to 1 mm and on the board you drew 0.5 mm, then when checking this is an error… This applies to gaps and everything the rest…
Yes of course, that’s what I mentioned and then said “never mind” What I forgot in this thread was to check the huge list of options in the KiCad DRC settings, which in Eagle in this case and what I compare with must be less detailed.
You can disable them if you wish, but the likelihood of errors increases
The DRC errors/checkout in KiCad takes hours while in Eagle just a few minutes with the same PCB
this is correct (at least compared kicad v7/v7.99 to the legacy pre-autocad eagle v7.7).
But it’s because eagle just had much fewer drc-checks.
fewer checks → fewer errors.
This is the price for increasing complexity and functionality.
For example your mentioned check from the opening post (check: component type definition == used component pads?) is simply not checked in eagle.
recommendation:
Take 1 hour of your time and go through the board-setup–>design rules–>violation severity settings. And disable all checks which you find annoying.
You have to do this only once, for all subsequent boards you could load these settings with “import settings from another board”.
example from my boards: see project:
some checks are disabled, some are moved from warning to error
You could also look into the ERC-settings in the schematic-setup–>Electrical rules–>violation severity.
Also this section is modyfied.
Thanks mf_ Is it possible for you to send a “template” for me (a setup you have made which works well for you)? I don’t know how to send files via this forum though.
I think that would defeat the purpose. The idea is that you spend some time thinking about what you actually need and what are your design habits.
For example the DRC violation “Footprint has no courtyard defined”. How can someone else know if this is important for you or not? It makes you think
There are other courtyard related violations, so the list continues. Should you fix malformed courtyards in your footprint libraries, and why? How often do you need to violate overlapping courtyards on purpose?
Extra tip which probably few users know: Gerber X3 standardizes gerber position files, KiCad can export them, and KiCad uses courtyards for them. Someone may need well formed courtyards for that.
So, how could someone say for you if you can ignore these violations or handle them as errors or warnings? Copying someone else’s settings isn’t probably very useful.
Good questions of you and wise comments! Thank you, I will have a look at this. I remember in earlier version of KiCad (v6) when I “imported settings from another board” the import did not include the settings so well, for example the PCB thickness on the imported PCB was like 15 centimeters instead of the previous one which was 1,6mm, so I stopped using that import function, which might work better now?
Another question: Is there any specific board house PCB/DRC Board Setup templates available for Kicad – with preset settings for the bigger producers like PCBWAY and others? Eagle had the possibility to load “DRC”-files for this
import function for board settings: works well for me.
You should try this again, the board thickness change (1,6mm–>15cm) was a bug some time ago (relied on the locale setting - comma/point problem if I recall correctly)
pcb manufacturer templates (like eagle dru-files): I have not seen such kicad templates until now.
There is a open gitlab issue regarding import of eagle dru-files: add Board Setup option to import Eagle .dru (design rules files) (#5722) · Issues · KiCad / KiCad Source Code / kicad · GitLab
Two years ago I had recommended that issue, but today with more&more expanding kicad functionality I don’t see it useful anymore (In the meantime kicad supports so much more drc checks than eagle that such a import would only be partially useful).
Building a own set of kicad templates for usual pcb constraints seems more reasonable.
Albeit eelik is correct that a user itself should think about the erc/drc settings I have attached (this time really:) one of my empty projects:
I use these as starting point for new projects (open project, then use SaveAs from projectmanager), or as source for the “import settings” command.
Take a look at the settings and then decide for yourself which are producing annoying false positives, which are useful to find problems in symbols/footprints early on and which are absolutely necessary to prevent critical errors.
Maybe I will collect some time and write a short description for other users (this is neither a promise nor a threat).
edit: and again forgot the attachment:
empty_board_2layer_multipcb_75um.zip (20.2 KB)
Thank you for the file, mf_ I will check it out now…
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