Okay I know this is a bit of a mess but this is my PCB for a few buttons and a rotary encoder. I think I have most of the things but I was just curious of there’s anything I need to think about or fix before ordering the PCBs. My DRC is clear but I’m not sure if I’m missing any components. Each button has a debouncer circuit and the encoder has a filtering circuit, according to the specs.
Thanks in advance for any advice 
No comment on missing components. This forum is intended to help with using KiCad software.
However,
When there is room I put a part number/name/identifier either in copper or silkscreen on each PCB along with a revision and a date.
If metal fasteners/standoffs will be used in what I assume are two mounting holes they will make connection to the zone(s) and connect them to any conductive piece they mount to.
Note that solder mask can not be relied upon to provide a mechanical barrier between conductors on the PCB and external conductive parts. One can use the “Margin” layer in the KiCad PCB editor to provide clearance around the mounting holes.
Another non-KiCad related note:
If the PCB is only restrained by the two fasteners in the middle of the board I would expect the board to flex when the buttons at either end are actuated.
I see GND sprinkled around your board, but I am not sure exactly what is being labeled. How many pcb layers do you have? Do you have a ground plane?
I do not see any serious problems “jumping out at me” but (when space permits) I like the tracks to be as wide or almost as wide as the pads to which they are connected. Unless you are switching voltages (> maybe 50V) or doing controlled impedance, there is usually no advantage of narrower tracks compared to wider ones. Most crosstalk is inductive and wider tracks are slightly better for that, especially if you have a ground plane. They also have lower DCR (probably not a problem in your design unless significant current is flowing through your board) and they are more mechanically robust.
Are the blue dots fiducials? Not expecting any but if so, they may be a bit close to the edge, some P&P machines need more clearance.
For anything with more stringent specs on GND quality than switches I’d probably draw an explicit GND path that eventually gets absorbed in the zones (personal preference though).
Also, vias may be actually for free. Often you see boards that look like the designer took it a personal challenge to minimize via count, but why? Maybe it matters when you buy a million of those but at R&D volumes it may be a total non-issue.
If it were my board (opinion!) I’d sprinkle a few around. We may be arguing superstition vs engineering for a switch board, but free-standing vias like near C6 are something I’d avoid, if possible (at least when reworking the board R13 will be more sensitive to mechanical damage than necessary). At least use a bigger size, there is no reason why it’s so small.
And if vias are essentially for free, scattering GND vias between zones and at the edge would seem straightforward. Yes, it’s only a switch board, but bad GND is a fairly common issue, and usually avoidable.
For a rule of thumb (matter of opinion, depends on the type of board but maybe a reasonable starting point without additional assumptions) put a pair of GND vias around every trace (or several) that breaks a GND zone.
For me vias at your PCB are looking surprisingly small. May be your tracks are simply wider than mine.
I use 0.25mm tracks and I don’t use vias at signal tracks. But when I imagine via at track end it will have 0.8mm diameter (with 0.4mm hole) as smaller than 0.4mm via holes I use only at thermal pads under ICs.
AS said before, this is not the place to ask for project specifics.
Still, i see quite a few places I’d address:
General tip: I usually start laying tracks on a big grid, like 1.270mm and then try to form the connections to the pad and other smaller details on smaller grids down to .3175mm
Working with bigger grids often helps to avoid these issues like in the lower right marked area.
Avoid acute angles between tracks and or pads as acid can be trapped there (usually not that of a problem with modern manufacturing, but still)
I think if you refill your top layer with “remove islands”, you will be astonished where all the ground connections went. At least in the lower left.
At the edge cuts, allow the copper enough room to pour around the switches. That’s where you lost a lot of connections.
And the GND connection to the pin header (top center) looks odd to me.
Lower left GND fill is connected with SW2, C4, C2, SW5. Why you expect it being removed by “remove islands” setting?
Well, it is connected with SW2. And that’s where it stops. Idon’t see how C5 or C2 is involved in connecting grounds.
I have drawn in in green where the GND fill stops.
OH! Now I see the bottom fill. Suppose it is GND.
I was saying about fill to the left of it (lower left corner).
The one you show is connected with SW1 (2 pads) and SW3 (2 pads) and C3. So it is connected with 5 pads while being connected with only one pad is enough to not be deleted by ‘remove islands’.
I was writing about C4 (not C5) and not involved in connecting grounds (whatever you understand under it) by just having pads connected to that GND fill what is enough to not delete it by ‘remove islands’.
I’m not questioning that GND fills (top and bottom) should be connected with some extra vias. I’ll just point out that ‘remove islands’ won’t remove any piece of filling here (I only looked at the top).
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