Hi Ste
that sounds reasonable
Thanks
Adding the line
.option noopiter gminsteps=0
does allow me to simulate the OPA1612 case.
This is however not resolving the root cause for the error. Indeed the op calculation converges towards the wrong equilibrium state (output saturated at 15-).
1 Like
Holger, thanks for your help.
I wonder , how to deal with the next candidate, OPA1622, which shows 11 pins (pin11 is in the Kicad model , thermal pad
My OPA1622DUAL lib includes all 11 pins ( the standard pins plus GND, EN and THERMAL_PAD (pad 11, which should be connected to V-)
Neither NGspice nor LTspice are happy with the netlist when using this .lib
* A dual opamp ngspice model
* file name: opadual1622c.lib
.subckt OPADUAL1622c
1IN+ VCC GND VEE 2IN+ 2IN- 2OUT EN 1OUT 1IN- THERMAL_PAD
.include OPA1622.LIB
XU1A 1in+ 1in- vcc vee 1out OPA1622
XU1B 2in+ 2in- vcc vee 2out OPA1622
.ends
The simulation does not even start, because of an error in
the subcircuit(s) or
in my definitions in the dual lib file:
NGspice in Kicad reports
Circuit: KiCad schematic
Too many parameters for subcircuit type “opadual1622c” (instance: xxu1)
Error: there aren’t any circuits loaded.
LTspice
The manufacturers model OPA1622.lib seems to interface with the usual 5 pins
.subckt OPA1622 IN+ IN- VCC VEE OUT
Where would I need to correct the file i.o. to address the problem?
Thanks in advance
Cheers
Frank
OPA1622 subcircuit is:
*$
* OPA1622
*****************************************************************************
* (C) Copyright 2019 Texas Instruments Incorporated. All rights reserved.
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose. The model is
** provided solely on an "as is" basis. The entire risk as to its quality
** and performance is with the customer
*****************************************************************************
*
* This model is subject to change without notice. Texas Instruments
* Incorporated is not responsible for updating this model.
*
*****************************************************************************
*
** Released by: Online Design Tools, Texas Instruments Inc.
* Part: OPA1622
* Date: 30JAN2019
* Model Type: Generic (suitable for all analysis types)
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SBOS727B –NOVEMBER 2015–REVISED MAY 2016
* Created with Green-Williams-Lis Op Amp Macro-model Architecture
*
* Model Version: Final 1.3
*
*****************************************************************************
*
* Updates:
*
* Final 1.3
* Updated claw, Simplified FEMT subckt.
*
* Final 1.2
* Release to Web.
*
*****************************************************************************
* Model Usage Notes:
* 1. The following parameters are modeled:
* OPEN-LOOP GAIN AND PHASE VS. FREQUENCY WITH RL, CL EFFECTS (Aol)
* UNITY GAIN BANDWIDTH (GBW)
* INPUT COMMON-MODE REJECTION RATIO VS. FREQUENCY (CMRR)
* POWER SUPPLY REJECTION RATIO VS. FREQUENCY (PSRR)
* DIFFERENTIAL INPUT IMPEDANCE (Zid)
* COMMON-MODE INPUT IMPEDANCE (Zic)
* OPEN-LOOP OUTPUT IMPEDANCE VS. FREQUENCY (Zo)
* OUTPUT CURRENT THROUGH THE SUPPLY (Iout)
* INPUT VOLTAGE NOISE DENSITY VS. FREQUENCY (en)
* INPUT CURRENT NOISE DENSITY VS. FREQUENCY (in)
* OUTPUT VOLTAGE SWING vs. OUTPUT CURRENT (Vo)
* SHORT-CIRCUIT OUTPUT CURRENT (Isc)
* QUIESCENT CURRENT (Iq)
* SETTLING TIME VS. CAPACITIVE LOAD (ts)
* SLEW RATE (SR)
* SMALL SIGNAL OVERSHOOT VS. CAPACITIVE LOAD
* LARGE SIGNAL RESPONSE
* OVERLOAD RECOVERY TIME (tor)
* INPUT BIAS CURRENT (Ib)
* INPUT OFFSET CURRENT (Ios)
* INPUT OFFSET VOLTAGE (Vos)
* INPUT OFFSET VOLTAGE VS. TEMPERATURE (VOS DRIFT)
* INPUT COMMON-MODE VOLTAGE RANGE (Vcm)
* INPUT OFFSET VOLTAGE VS. INPUT COMMON-MODE VOLTAGE (Vos vs. Vcm)
* INPUT/OUTPUT ESD CELLS (ESDin, ESDout)
******************************************************
.subckt OPA1622 IN+ IN- VCC VEE OUT
******************************************************
.model R_NOISELESS RES (TCE=0 T_ABS=-273.15)
******************************************************
I_OS ESDn MID 1.19e-06
I_B 30 MID 1.2e-06
V_GRp 45 MID 56
V_GRn 46 MID -56
V_ISCp 39 MID 144.443
V_ISCn 40 MID -132.622
V_ORn 38 VCLP -3
V11 44 37 0
V_ORp 36 VCLP 3
V12 43 35 0
V4 27 OUT 0
VCM_MIN 67 VEE_B 1.5
VCM_MAX 68 VCC_B -1
I_Q VCC VEE 0.0026
XV_OS 75 30 VOS_DRIFT_OPA1622
XU5 ESDp ESDn VCC VEE ESD_0_OPA1622
XU4 19 ESDp MID PSRR_CMRR_0_OPA1622
XU3 20 VEE_B MID PSRR_CMRR_1_OPA1622
XU2 21 VCC_B MID PSRR_CMRR_2_OPA1622
XU1 23 22 CLAMP VSENSE CLAW_CLAMP CL_CLAMP 24 26 27 MID AOL_ZO_0_OPA1622
C28 31 MID 1P
R77 32 31 R_NOISELESS 100
C27 33 MID 1P
R76 34 33 R_NOISELESS 100
R75 MID 35 R_NOISELESS 1
GVCCS8 35 MID 36 MID -1
R74 37 MID R_NOISELESS 1
GVCCS7 37 MID 38 MID -1
Xi_nn ESDn MID FEMT_0_OPA1622
Xi_np MID 30 FEMT_0_OPA1622
Xe_n ESDp 30 VNSE_0_OPA1622
XIQPos VIMON MID MID VCC VCCS_LIMIT_IQ_0_OPA1622
XIQNeg MID VIMON VEE MID VCCS_LIMIT_IQ_0_OPA1622
C_DIFF ESDp ESDn 8e-13
XCL_AMP 39 40 VIMON MID 41 42 CLAMP_AMP_LO_0_OPA1622
SOR_SWp CLAMP 43 CLAMP 43 S_VSWITCH_1
SOR_SWn 44 CLAMP 44 CLAMP S_VSWITCH_1
XGR_AMP 45 46 47 MID 48 49 CLAMP_AMP_HI_0_OPA1622
R39 45 MID R_NOISELESS 1T
R37 46 MID R_NOISELESS 1T
R42 VSENSE 47 R_NOISELESS 1M
C19 47 MID 1F
R38 48 MID R_NOISELESS 1
R36 MID 49 R_NOISELESS 1
R40 48 50 R_NOISELESS 1M
R41 49 51 R_NOISELESS 1M
C17 50 MID 1F
C18 MID 51 1F
XGR_SRC 50 51 CLAMP MID VCCS_LIM_GR_0_OPA1622
R21 41 MID R_NOISELESS 1
R20 MID 42 R_NOISELESS 1
R29 41 52 R_NOISELESS 1M
R30 42 53 R_NOISELESS 1M
C9 52 MID 1F
C8 MID 53 1F
XCL_SRC 52 53 CL_CLAMP MID VCCS_LIM_4_0_OPA1622
R22 39 MID R_NOISELESS 1T
R19 MID 40 R_NOISELESS 1T
XCLAWp VIMON MID 54 VCC_B VCCS_LIM_CLAW+_0_OPA1622
XCLAWn MID VIMON VEE_B 55 VCCS_LIM_CLAW-_0_OPA1622
R12 54 VCC_B R_NOISELESS 1K
R16 54 56 R_NOISELESS 1M
R13 VEE_B 55 R_NOISELESS 1K
R17 57 55 R_NOISELESS 1M
C6 57 MID 1F
C5 MID 56 1F
G2 VCC_CLP MID 56 MID -1M
R15 VCC_CLP MID R_NOISELESS 1K
G3 VEE_CLP MID 57 MID -1M
R14 MID VEE_CLP R_NOISELESS 1K
XCLAW_AMP VCC_CLP VEE_CLP VOUT_S MID 58 59 CLAMP_AMP_LO_0_OPA1622
R26 VCC_CLP MID R_NOISELESS 1T
R23 VEE_CLP MID R_NOISELESS 1T
R25 58 MID R_NOISELESS 1
R24 MID 59 R_NOISELESS 1
R27 58 60 R_NOISELESS 1M
R28 59 61 R_NOISELESS 1M
C11 60 MID 1F
C10 MID 61 1F
XCLAW_SRC 60 61 CLAW_CLAMP MID VCCS_LIM_3_0_OPA1622
H2 34 MID V11 -1
H3 32 MID V12 1
C12 SW_OL MID 100P
R32 62 SW_OL R_NOISELESS 100
R31 62 MID R_NOISELESS 1
XOL_SENSE MID 62 33 31 OL_SENSE_0_OPA1622
S1 24 26 SW_OL MID S_VSWITCH_3
H1 63 MID V4 1K
S7 VEE OUT VEE OUT S_VSWITCH_4
S6 OUT VCC OUT VCC S_VSWITCH_4
R11 MID 64 R_NOISELESS 1T
R18 64 VOUT_S R_NOISELESS 100
C7 VOUT_S MID 1N
E5 64 MID OUT MID 1
C13 VIMON MID 1N
R33 63 VIMON R_NOISELESS 100
R10 MID 63 R_NOISELESS 1T
R47 65 VCLP R_NOISELESS 100
C24 VCLP MID 100P
E4 65 MID CL_CLAMP MID 1
C4 23 MID 1F
R9 23 66 R_NOISELESS 1M
R7 MID 67 R_NOISELESS 1T
R6 68 MID R_NOISELESS 1T
R8 MID 66 R_NOISELESS 1
XVCM_CLAMP 69 MID 66 MID 68 67 VCCS_EXT_LIM_0_OPA1622
E1 MID 0 70 0 1
R89 VEE_B 0 R_NOISELESS 1
R5 71 VEE_B R_NOISELESS 1M
C3 71 0 1F
R60 70 71 R_NOISELESS 1MEG
C1 70 0 1
R3 70 0 R_NOISELESS 1T
R59 72 70 R_NOISELESS 1MEG
C2 72 0 1F
R4 VCC_B 72 R_NOISELESS 1M
R88 VCC_B 0 R_NOISELESS 1
G17 VEE_B 0 VEE 0 -1
G16 VCC_B 0 VCC 0 -1
R_PSR 73 69 R_NOISELESS 1K
G_PSR 69 73 21 20 -1M
R2 22 ESDn R_NOISELESS 1M
R1 73 74 R_NOISELESS 1M
R_CMR 75 74 R_NOISELESS 1K
G_CMR 74 75 19 MID -1M
C_CMn ESDn MID 9e-13
C_CMp MID ESDp 9e-13
R53 ESDn MID R_NOISELESS 1T
R52 MID ESDp R_NOISELESS 1T
R35 IN- ESDn R_NOISELESS 10M
R34 IN+ ESDp R_NOISELESS 10M
.MODEL S_VSWITCH_1 VSWITCH (RON=10e-3 ROFF=1e9 VON=10e-3 VOFF=0)
.MODEL S_VSWITCH_3 VSWITCH (RON=1e-3 ROFF=1e9 VON=900e-3 VOFF=800e-3)
.MODEL S_VSWITCH_4 VSWITCH (RON=50 ROFF=1e12 VON=500e-3 VOFF=450e-3)
.ENDS OPA1622
*
.subckt VOS_DRIFT_OPA1622 VOS+ VOS-
.param DC = 9.65E-05
.param POL = 1
.param DRIFT = 5.00E-07
E1 VOS+ VOS- VALUE={DC+POL*DRIFT*(TEMP-25)}
.ENDS
*
.SUBCKT ESD_0_OPA1622 ESDp ESDn VCC VEE
SW6 ESDn ESDp ESDn ESDp S_VSWITCH_1
SW5 ESDp ESDn ESDp ESDn S_VSWITCH_1
SW4 ESDn VCC ESDn VCC S_VSWITCH_3
SW3 VEE ESDn VEE ESDn S_VSWITCH_3
SW2 ESDp VCC ESDp VCC S_VSWITCH_3
SW1 VEE ESDp VEE ESDp S_VSWITCH_3
.MODEL S_VSWITCH_1 VSWITCH (RON=50 ROFF=1e12 VON=700e-3 VOFF=650e-3)
.MODEL S_VSWITCH_3 VSWITCH (RON=50 ROFF=1e12 VON=500e-3 VOFF=450e-3)
.ENDS
*
.SUBCKT PSRR_CMRR_0_OPA1622 psrr_in psrr_vccb mid
.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
R74 mid psrr_in R_NOISELESS 1
G_2 psrr_in mid 4 mid -29.93
R2b mid 4 R_NOISELESS 3456619.4262
C2a 4 5 5.3052e-15
R73 5 4 R_NOISELESS 100MEG
R49 mid 5 R_NOISELESS 1
GVCCS7 5 mid 6 mid -1
R2a mid 6 R_NOISELESS 3186.091
C1a 6 7 5.5635e-12
R48 7 6 R_NOISELESS 100MEG
G_1 7 mid psrr_vccb mid -0.013774
Rsrc mid 7 R_NOISELESS 1
.ENDS
*
.SUBCKT PSRR_CMRR_1_OPA1622 psrr_in psrr_vccb psrr_mid
.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
R80 psrr_mid psrr_in R_NOISELESS 1315.9558
C27 psrr_in 4 1.1413e-11
R79 4 psrr_in R_NOISELESS 100MEG
GVCCS8 4 psrr_mid psrr_vccb psrr_mid -0.007494
R78 psrr_mid 4 R_NOISELESS 1
.ENDS
*
.SUBCKT PSRR_CMRR_2_OPA1622 psrr_in psrr_vccb mid
.model R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
R74 mid psrr_in R_NOISELESS 1
G_2 psrr_in mid 4 mid -1177.4444
R2b mid 4 R_NOISELESS 85001.8889
C2a 4 5 1.7684e-13
R73 5 4 R_NOISELESS 100MEG
R49 mid 5 R_NOISELESS 1
GVCCS7 5 mid 6 mid -1
R2a mid 6 R_NOISELESS 85001.8889
C1a 6 7 1.7684e-13
R48 7 6 R_NOISELESS 100MEG
G_1 7 mid psrr_vccb mid -0.00011268
Rsrc mid 7 R_NOISELESS 1
.ENDS
*
.SUBCKT VCCS_LIM_2_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 0.019897
.PARAM IPOS = 0.20467
.PARAM INEG = -0.20839
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT VCCS_LIM_1_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-4
.PARAM IPOS = .5
.PARAM INEG = -.5
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT AOL_ZO_0_OPA1622 AOL_INP AOL_INN CLAMP VSENSE CLAW_CLAMP CL_CLAMP ZO_CLEFT ZO_CRIGHT ZO_OUT MID
.MODEL R_NOISELESS RES ( TCE=0 T_ABS=-273.15)
C1_A0 CLAMP MID 8.9513e-09
R4_A0 MID CLAMP R_NOISELESS 1MEG
XVCCS_LIM_2_A0 4_A0 MID MID CLAMP VCCS_LIM_2_0_OPA1622
R3_A0 MID 4_A0 R_NOISELESS 1MEG
XVCCS_LIM_1_A0 AOL_INP AOL_INN MID 4_A0 VCCS_LIM_1_0_OPA1622
R4_VS VSENSE MID R_NOISELESS 1K
GVCCS4_VS VSENSE MID CLAMP MID -1M
C2_A2 out2 MID 3.1623e-13
R3_A2 out2 MID R_NOISELESS 1MEG
GVCCS3_A2 out2 MID VSENSE MID -1U
C3_A3 4_A3 out3 1.054e-13
GVCCS4_A3 4_A3 MID out2 MID 662.2517
R4_A3 4_A3 MID R_NOISELESS 1
R5_A3 out3 4_A3 R_NOISELESS 10K
R6_A3 out3 MID R_NOISELESS 15.1228
C2_A4 out4 MID 2.4985e-16
R3_A4 out4 MID R_NOISELESS 1MEG
GVCCS3_A4 out4 MID out3 MID -1U
C3_A5 4_A5 out5 6.9198e-12
GVCCS4_A5 4_A5 MID out4 MID 1347.8261
R4_A5 4_A5 MID R_NOISELESS 1
R5_A5 out5 4_A5 R_NOISELESS 10K
R6_A5 out5 MID R_NOISELESS 7.4249
C3_A6 4_A6 out6 9.2532e-14
GVCCS4_A6 4_A6 MID out5 MID -2.3256
R4_A6 4_A6 MID R_NOISELESS 1
R5_A6 out6 4_A6 R_NOISELESS 10K
R6_A6 out6 MID R_NOISELESS 7543.8596
R4_CC CLAW_CLAMP MID R_NOISELESS 1K
GVCCS4_CC CLAW_CLAMP MID out6 MID -1M
R4_CL CL_CLAMP MID R_NOISELESS 1K
GVCCS4_CL CL_CLAMP MID CLAW_CLAMP MID -1M
G_Aol_Zo Zo_Cleft MID CL_CLAMP ZO_OUT -337.6404
GVCCS1_1 outz1 MID Zo_Cright MID -1.9714
C1_1 Zo_Cleft Zo_Cright 0.017695
R2_1 Zo_Cright MID R_NOISELESS 10293.9008
R1_1 Zo_Cright Zo_Cleft R_NOISELESS 10K
Rdc_1 Zo_Cleft MID R_NOISELESS 1
GVCCS2_2 outz2 MID net2 MID -1
C2_2 5_2 MID 3.8062e-13
R5_2 net2 5_2 R_NOISELESS 10K
R4_2 net2 outz1 R_NOISELESS 70467.5261
R7_2 outz1 MID R_NOISELESS 1
R1_3 2_3 MID R_NOISELESS 1
R11_3 5_3 MID R_NOISELESS 44.9605
C4_3 5_3 outz2 3.2313e-14
R10_3 5_3 outz2 R_NOISELESS 10K
XVCVS_LIM_1 5_3 MID MID 2_3 VCCS_LIM_ZO_0_OPA1622
R9_3 outz2 MID R_NOISELESS 1
Rdummy MID ZO_OUT R_NOISELESS 377.4
Rx ZO_OUT 2_3 R_NOISELESS 3774
.ENDS
*
.SUBCKT VCCS_LIM_ZO_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 223.4174
.PARAM IPOS = 1090.256E2
.PARAM INEG = -1001.031E2
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT FEMT_0_OPA1622 1 2
.PARAM FLWF=1
.PARAM NLFF=7100
.PARAM NVRF=800
.PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164}
.PARAM RNVF={1.184*PWR(NVRF,2)}
.MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVNF
D2 8 0 DVNF
E1 3 6 7 8 {GLFF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNVF}
R5 5 0 {RNVF}
R6 3 4 1E9
R7 4 0 1E9
G1 1 2 3 4 1E-6
.ENDS
*
.SUBCKT VNSE_0_OPA1622 1 2
.PARAM FLW=1
.PARAM NLF=3
.PARAM NVR=2.8
.PARAM GLF={PWR(FLW,0.25)*NLF/1164}
.PARAM RNV={1.184*PWR(NVR,2)}
.MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16
I1 0 7 10E-3
I2 0 8 10E-3
D1 7 0 DVN
D2 8 0 DVN
E1 3 6 7 8 {GLF}
R1 3 0 1E9
R2 3 0 1E9
R3 3 6 1E9
E2 6 4 5 0 10
R4 5 0 {RNV}
R5 5 0 {RNV}
R6 3 4 1E9
R7 4 0 1E9
E3 1 2 3 4 1
.ENDS
*
.SUBCKT VCCS_LIMIT_IQ_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1E-3
G1 IOUT- IOUT+ VALUE={IF( (V(VC+,VC-)<=0),0,GAIN*V(VC+,VC-) )}
.ENDS
*
.SUBCKT CLAMP_AMP_LO_0_OPA1622 VC+ VC- VIN COM VO+ VO-
.PARAM G=1
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
*
.SUBCKT CLAMP_AMP_HI_0_OPA1622 VC+ VC- VIN COM VO+ VO-
.PARAM G=10
GVO+ COM VO+ VALUE = {IF(V(VIN,COM)>V(VC+,COM),((V(VIN,COM)-V(VC+,COM))*G),0)}
GVO- COM VO- VALUE = {IF(V(VIN,COM)<V(VC-,COM),((V(VC-,COM)-V(VIN,COM))*G),0)}
.ENDS
*
.SUBCKT VCCS_LIM_GR_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 0.40935E1
.PARAM INEG = -0.40935E1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT VCCS_LIM_4_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 0.2352E1
.PARAM INEG = -0.2352E1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT VCCS_LIM_CLAW+_0_OPA1622 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 900e-6)
+(48.1477, 0.00124)
+(96.2953, 0.0016674)
+(128.3938, 0.0019644)
+(129.9987, 0.001964)
+(133.2085, 0.0020108)
+(136.4184, 0.0021343)
+(139.6282, 0.0027696)
+(142.8381, 0.012221)
+(144.443, 0.01743)
.ENDS
*
.SUBCKT VCCS_LIM_CLAW-_0_OPA1622 VC+ VC- IOUT+ IOUT-
G1 IOUT+ IOUT- TABLE {(V(VC+,VC-))} =
+(0, 900e-6)
+(44.2073, 0.0012087)
+(88.4147, 0.0015841)
+(117.8862, 0.0018348)
+(119.3598, 0.0018565)
+(122.307, 0.0018981)
+(125.2541, 0.0019297)
+(128.2013, 0.0020805)
+(131.1484, 0.011028)
+(132.622, 0.01782)
.ENDS
*
.SUBCKT VCCS_LIM_3_0_OPA1622 VC+ VC- IOUT+ IOUT-
.PARAM GAIN = 1
.PARAM IPOS = 0.1176E1
.PARAM INEG = -0.1176E1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VC+,VC-),INEG,IPOS)}
.ENDS
*
.SUBCKT OL_SENSE_0_OPA1622 COM SW+ OLN OLP
GSW+ COM SW+ VALUE = {IF((V(OLN,COM)>10E-3 | V(OLP,COM)>10E-3),1,0)}
.ENDS
*
.SUBCKT VCCS_EXT_LIM_0_OPA1622 VIN+ VIN- IOUT- IOUT+ VP+ VP-
.PARAM GAIN = 1
G1 IOUT+ IOUT- VALUE={LIMIT(GAIN*V(VIN+,VIN-),V(VP-,VIN-), V(VP+,VIN-))}
.ENDS
*
Can you edit your posts to enclose both your lib file text and TI’s file text in triple backticks above and below? (backtick = key to the left of the 1 on the keyboard)
This is an example of how it should look like in the text editor and then how it gets rendered:
In the subcircuit
.subckt OPADUAL1622c 1IN+ VCC GND VEE 2IN+ 2IN- 2OUT EN 1OUT 1IN- THERMAL_PAD
you probly will need to serve the node THERMAL_PAD somehow within the subcircuit.
This node should not actively participate in the simulation, so not to influence the results. To achieve this, you may place a large resistor into the subcircuit, like
.subckt OPADUAL1622c 1IN+ VCC GND VEE 2IN+ 2IN- 2OUT EN 1OUT 1IN- THERMAL_PAD
Rth THERMAL_PAD VEE 1e12
.include OPA1622.LIB
...
(not tested).
1 Like
Success!
Addressing the thermal pad with Holgers additional lines
makes a successful simulation!
Thanks a lot!!
Frank
Can you still edit the post like I suggested so it’s easier to read in the future?
Ah , I see , on my keyboard the backtick is in another corner ( top-right)
1 Like
Ah, yeah. I was taking a shower and realized you maybe have a non-standard keyboard layout, so I came back to my computer to tell you but you already figured it out. Well, anyway, this is useful to know if you are going to make more posts in the future. Thanks for taking the time to figure it out!