Hi Guys,
I don’t believe the Actual Hole Clearance value provided in at least the v8.0.1 is correct.
To be clear I am trying to ensure that I provide at least 0.25mm drilling hole to hole clearance, this is applicable for all holes.
In this specific case I have a PTH for the pin of a connector I am checking against a nearby via.
The PTH pin is set to a hole size of 0.85mm (0.425 radius) and the via is set to a 0.2mm drill hole.
When these two holes are highlighted the software states the following measurements
But if I do the calculation manually:
0.425mm edge of PTH
0.732mm edge of via hole
Take the difference and you get 0.307mm
If I zoom in to the edge of the via I can see the value at 0.607mm which when you take of the 0.425mm PTH radius gives the 0.182mm clearance the tool reports. Therefore proving that the calculation for the actual hole clearance is done to the edge of the via pad and not the drill size of the via.
That is supported by the actual clearance and the actual hole clearance being reported at the same value (PTH pad is currently same as hole size for test purposes)
Also to add when the PTH is set back to have the right pad size and hole size it uses the pad size for the hole to hole clearance as well
Hole sizes and clearances are a bit finicky and ambiguous in PCB design (not KiCad specific).
For example, when you set a via size to 0.2mm, (or any plated hole), then usually this is interpreted as the size of the finished hole. It is usually assumed the PCB manufacturer uses a bigger hole, and the hole will be close to your 0.2mm after it has been plated.
My assumption would be that the hole to hole distance would be calculated from the actual drill size, and KiCad does not know this exactly because (as far as I can tell) KiCad does not know plating thickness on the inside of the via’s and pads. My own expectation is that KiCad would calculate hole-to-hole-distance somewhere close to .712 - .445 = 0.27 mm.
I think looking at a via image in Kicad its actually showing the finished hole size.
Take the image below - a via with a 0.2mm via hole, and a 0.45mm via diameter.
The inner circle appears to be the finished hole diameter, the second circle is 20um thick would appear to represent the plating.
The outer circle is the diameter of the pad
What is odd though is that when you output the drill file the drill size for this via would be listed as 0.2mm which would mean the PCB house would have to make that bigger to account for the plating to achieve a 0.2mm finished hole size.
The only way I can think which is very manual in kicad is to generate a drill table with the different sizes highlights with different symbols as an additional gerber layer to communicate it to the pcb manufacturer.
This is not odd. It is established / common practice.
The PCB manufacturer knows best how thick the plating in their via’s is. So they interpret the sizes you give them as the size for the finished hole, and they select drills to fit their own via plating thickness.
After that it gets a bit complicated. There are many different PCB manufacturers, and in general they do not adhere to sizes very strictly, It is relatively common for example that PCB manufacturers make all sorts of little changes to gerber files before they produce your PCB’s. For example if “fingers” on solder mask are too thin, then a lot of PCB manufacturers just delete them. Others will refuse your PCB which causes delays. Neither situation is optimal, but “it’s life”.
There are no set rules. If you want something special, for example holes with narrow tolerances for press fit connectors, then you have to get into contact with your PCB manufacturer to make sure they make the holes with tolerances that are acceptable for your connector.
One of the consequences of this “sloppiness”, is that you should stay away from the minimums that a PCB manufacturer claims they can manufacture. If you just set the minimum hole distance to for example 0.5mm, then you don’t have to worry anymore about such small differences in hole locations.
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Revisiting this as the initial issue I was flagging was the hole to hole calculation is incorrect.
The assuming of the 0.27 distance is also incorrect. I did provide an image showing it was calculated at 0.1822 so quite a lot different.
I appreciate kicad doesn’t know drill size and seems to have hard coded playing thickness of around 20um. But the current implementation renders the hole to hole check and minimum web thickness a difficult thing to check at this stage and is something specified by manufacturers.
0.610 -0.425 =0.185 which is a closer calc to what I think kicad is really doing.
I get your point to stay away from minimums, I would love to, but I’m sure you know most things are a trade off and balancing the signal integrity against keeping away from the minimums is easier said than done.
I think the calc should have a result of about 0.267 as you mentioned in my specific example showing the 20um plating added to finished hole size to get to drill hole size and use clearance from there.
This assumes that the mfg does 20um plating. The guys I’m looking at do 50um so even bigger impact.
Would be nice if there was a control in the tool to set via plating thickness and have the hole to hole clearance check from that outer diameter.
