So for instance on each side of an optoisolator or any similar part you would be able to kit a key and highlight the related net perhaps every time you hit the key again it makes a sucessive jump, highlighting further related but not directly connected nets which would be trivial for resistors etc…
This would be a big help when tracing from one pin on a chip… it where it finally goes on a connector with optoisolators and resistors in between etc…
Which version are you using? This feature is present in the current 5.0 version via the ‘highlight net’ button on the left toolbar. There is no functionality for ‘successive jumps’ however.
On the board layout not the schematic… would be useful on the schematic also.
I’m aware of how net highlighting currently works.
Crossprobing and highlighting nets seems to work for me between eeschema and pcbnew & highlights both the connected trace and the connection on the schematic. You need to choose highlight net (2nd button on LH toolbar) to activate this.
If this is not what you want, could you elaborate further?
That has nothing to do with what I was talking about… please reread my original post and understand it before replying. Highlighting related nets such as nets on opposite sides of a resistor, or opposite sides of a buffer chip or what have you it would require either some extra design work in the schematic or symbols that know something of their own internals.
Please understand that this is a user to user support forum & not a feature request board.
I read your question through several times to try and understand what you were after and thought that I understood your problem & tried to answer it. Clearly I have failed so I will follow your advice and not reply further as I have clearly annoyed you.
No kidding 
… I posted here to see if other people though it might also be useful or if perhaps there is a better way to do that. Burdening the developers with half baked ideas is also annoying for them I am sure.
Also just to clarify… it’s better not to bother answering something until you understand it fully I would much more have appreciated if you had asked for clarification rather than just assuming what I meant and going ahead and explaining information to met that I already know… I’m annoyed that the waste of effort on your part occured, but in no way do I lack appreciation for that… so thanks for trying at least.
I can see how this feature, if implemented, would be useful during initial placement, before we start routing. You could use that feature to highlight the successively “related” components and pull in the “highly connected” neighbours closer together… to form good clusters.
A plugin could do this, possibly? (I haven’t written any, so give it the weight it deserves 
)
This feature could be part of the more powerful ERC stuff that is planned for some future KiCad version. (It at least needs similar stuff on the backend side. As a powerful ERC would also need to know how a signal moves through a particular symbol)
Thats exactly the point. KiCad would have to KNOW how ANY Signal crosses ANY integrated circuit. But even for passive elements this isnt trivial at all when it comes to analog circuits.
This forum would be full of wishes for individual configuration of signal-path …
To @cb88:
You dont sound like someone seeking help from open-source people ! More like someone accessing a hotline after paying heaps of money for a commercial software.
Finally, many of us are NOT native english speakers (me included) so you should take into account that your sentences sometimes leave some space for interpretation and misunderstanding.
Nonsense… I’m not demanding anything. Just throwing an idea out there, any tone or attitude of entitlement you are perceiving from me is in your imagination. And as Rene pointed out above you… if a more powerful ERC is built then this might make a good addition on top of that work. I or no one else is going to hold your hand so you don’t get offended so YOU stop making assumptions that others are being this way or that to offend you.
That seems reasonable, for some symbols I guess that information could be derived from spice models? Would that be a valid approach even for logic components?
seems you just confirmed my opinion …
