A symbol with multiple footprints?

I seem to keep running into this situation - there is a part that comes in various packages and every package has different pins assigned to the same functions. For example if Vdd for one package would be be pin #1, for the other it would be pin#5 etc. However the symbol for the part is identical, other than this mismatch. I was wondering if there is an easy way to create a symbol like that in EESchema that would link later to those different footprints easily? So far I would create multiple copies of the same symbol and append name of the footprint into the name of the symbol, which is not really a great solution. The other solution I see is to use the name of the pin for the pin number. Not sure I like that very much either. Is there anything else that can be done?

No you need one symbol per footprint in this case

Well, you can still use functional names in place of pin numbers and do the same for the footprints. I do this all the time for FET arrays. Works great. However with FET arrays all the pads are called G,S,D,G1,S1,D1 etc. which looks ok on the footprint. It might not look so great when the names start getting longer. May be it is not such a big deal.

If you use special names for the symbol pins then you will need one footprint per part. So in the end you have a choice. One generic symbol with special pin names and lots of specialized footprints or specialized symbols for generic footprints. (I personally prefer the specialized symbol over specialized footprints)

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Different strokes for different folks.

Personally, I don’t like this. When troubleshooting a board and all I have on hand is the schematic, I want to know if pin2 is the gate or if it’s the drain (using your FET example). If the schematic doesn’t use pin numbers I loose that documentation link to know which pin on the package that I’m looking at that I need to probe, and am forced to then stop what I’m doing to find the datasheet for that part. Then stop what I’m doing to find the datasheet for the next part, etc.

But that’s me.


I wonder if I can use multiple unit symbol and just draw a full symbol for each unit. You can certainly run into trouble when auto annotating a schematic with multiple symbols like that plus having A, B etc in the name is not very descriptive. I wonder if it would work though.
EESchema needs an alternate body style feature. Kind of like the Multiple units, only instead of a unit you can enter as many symbols as you want and then select which symbol is used when you place it in the schematics.

I can think of many downsides to that approach. So what would be the benefit of it that merits dealing with all of this?

It kinda does. The DeMorgan symbol feature. I haven’t really used it so I don’t know all the ins and outs about it, but I doubt that is really what you are looking for. From your description of the issue, you would like an alternate pinout feature for symbols.

Oh, snap. I just played a little with the DeMorgan feature in 5.0.1 library editor. It looks like (though I haven’t tested fully) that the different DeMorgan representations of symbols can have different pinouts in addition to the expected different geometry.
By abusing this feature you can have 2 different pinouts on a symbol. An expansion of this underlying framework (though I doubt it is that simple) would be to have the different pinouts all in one symbol (sort of like aliases) instead of multiple symbols cluttering up the library.

But as Rene points out, that added complexity would need to be balanced by clear and measurable benefits. The normal cost:benefit ratio applies. Since we can already have multiple pinouts as multiple symbol objects, and it is easy to change a symbol in the symbol properties without loosing any data in the fields.

This is planned for the new file format. (More precisely the specification allows for extremely flexible inheritance options.)

But i would guess that v6 will only implement the bare minimum feature set to get feature parity with v5 and earlier. So the more powerful stuff might only come with v7. (Unless you either take care of this or find somebody who does it for you.)

GUI is like a joke, if you have to explain it - it’s not that good. :slight_smile: Over the years I made several attempts to understand DeMorgan symbol feature. I even went as far as reading the manual! I still don’t get it. It looks like a multiple unit symbol feature with number of units limited to 2?

Regardless, I would need more than two variations of symbols.

For example? Give me your top two.

Just to be clear, my response is about the “just misuse the current multi unit feature” suggestion of yours. (Not about the features that might come with version 7)

The single symbol is much more complex to make (My guess is that it is at least the same amount of work as creating many specialized symbols. Maybe even more as copying a symbol is very easy. Copying between different units however is a pain.)

The reader of the schematic will be confused if they find only one unit of a multi unit symbol. (Just imagine a reader finds U7B but not U7A. They will assume that you as the circuit designer made a terrible mistake. Or they might doubt the signalling of KiCad.)

You can not use the ERC check of the symbol editor to check that you did not make a mistake. (It will only give you a lot of false positive results as you will have many copies of the same pin number in different units.)

You still can not set the footprint differently for different versions of the part. (One symbol, one footprint field) This in comparison with fully specified symbols as i would suggest. (These allow you to already set the footprint in the library -> eliminates possible user errors.)

You do not even get better BOM info when compared to the “one generic symbol” workflow. However when using the fully specified symbol workflow as i would propose you get that for (nearly) free. (You still need to fill out the extra fields. but if you use the MPN as the symbol name then you really get it for free)

In conclusion: I just do not see any benefit when compared to the “fully specified symbol” workflow.

It should be understandable once you understand what DeMorgan’s Theorems mean and then look at how it is implemented in the logic libraries (like the 74xx library that I pulled my above example from). Here is a primer on DeMorgan’s Theorem:

Probably not. Simple cut and paste, following pin rearrangement would do

Agree. Even U7A by itself would be confusing, because you don’t expect a multi-unit component. If only there was a way to rename A, B, C etc into the user defined designation. The you could have them as the footprint name.

Not sure about this. Why can’t I use CRC check? It would work just like a CRC check for a regular multi unit component. CRC doesn’t care which unit you use.

Would not affect me. I always assign all the footprints manually, when schematic is complete. Even if I designed every single symbol by myself, I wouldn’t rely on pre-assigned footprints. Something is bound to go wrong.

Are you talking about atomic parts when you talk about “fully specified symbol”. If so, that’s definitely an alternate approach to the design, but I don’t think it should be exclusive. You can use one or the other. And if you use the other, it would be nice to have variable pinouts for a single symbol.

It should be …but it is still not “understandable” If you make a symbol, even if it is a logic gate and it is tied to a real hardware (i.e. chip), why would you need to tinker around with alternate symbols? All you need is an actually symbol that is designed in the hardware and defined in the data sheet. I understand the theorem. I just fail to understand under what circumstances you would use this option during schematic capture.

It would be used in the cases where the schematic is designed to most clearly document the logic, not necessarily the physical construction.

As I said up on reply#5:

May be you should apply DeMorgan theorem to your explanation. Switching one logic symbol for another doesn’t simplify schematics and unlike the theorem, DeMorgan symbol functionality doesn’t simplify complex logical expressions. So I’m pretty much where I started from. But it’s ok. It is not really the subject at hand.

Maybe you should learn some electronics :slight_smile: http://sce2.umkc.edu/csee/hieberm/281_new/lectures/basic-electrical-components/pos-neg-logic.html

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