5.99 differential routing

[kdlohry]

I am trying to route an ethernet differential pair using the parameters from the Raspberry PI CM4IO board:

Not sure that image uploaded: DPWidth=0.13mm, DPGap=0.25mm

I am routing this to the RPI CM4 which has a 0.2x0.7mm pad with a pitch of 0.4 mm and I get a DRC violation. It won’t let me start the trace or end the traces there. If I change the DPWidth to 0.1mm it works.

Plus during DRC I get Error: Clearance violation (netclass ‘100R’(diff pair) clearance 0.25mm; actual 0.20mm) on the two pads involved. How am I supposed to route a differential pair that has a greater gap than the pins I’m routing to?

Using ver. Application: KiCad (64-bit)

Version: (5.99.0-10516-gd4e5861c62), release build

Libraries:
wxWidgets 3.1.4
libcurl/7.74.0-DEV Schannel zlib/1.2.11

Platform: Windows 10 (build 19041), 64-bit edition, 64 bit, Little endian, wxMSW

Build Info:
Date: May 5 2021 21:01:39
wxWidgets: 3.1.4 (wchar_t,STL containers)
Boost: 1.75.0
OCC: 7.5.0
Curl: 7.74.0-DEV
ngspice: 34
Compiler: Visual C++ 1928 without C++ ABI

Build settings:
KICAD_SCRIPTING=ON
KICAD_SCRIPTING_MODULES=ON
KICAD_SCRIPTING_PYTHON3=ON
KICAD_SCRIPTING_WXPYTHON=ON
KICAD_SCRIPTING_WXPYTHON_PHOENIX=ON
KICAD_SCRIPTING_ACTION_MENU=ON
KICAD_USE_OCC=ON
KICAD_SPICE=ON

[Seth_h]

You can define a rule area that specifies a smaller width for that area.

First, add a named rule area, then in board setup, create a custom rule for that area that sets the DP gap smaller

[craftyjon]

There also might be a bug here: we shouldn’t be throwing a clearance violation if the gap exceeds the optimal gap at the fanout.

[Seth_h]

Maybe. We’d need more than a 25px high screen shot to determine though

[kdlohry]

Thanks for that great tip Seth. I didn’t even realize this feature existed in kicad. Unfortunately it doesn’t do anything useful (it just hangs) with the following rule:

And if I get rid of the opt 2.5mm statement it puts the traces right next to each other (no gap). Also tried adding (min 2.1mm) and it just hangs. So I just changed the diff pair gap for the whole segment to 2.3mm and it allows me to route to the pins. Not exactly sure why. This is the current netclass I’m using:

Thanks, again,
Kermit

[Seth_h]

Hmm… It definitely shouldn’t hang here, so I’d be inclined to say that is a bug.

Could you please report the issue and attach the project (Archive Project) to the issue at https://gitlab.com/kicad/code/kicad/-/issues ? That will let us fix the problem for everyone in v6

[craftyjon]

For the diff_pair_gap constraint, only the opt value is used today. Having a max smaller than opt also doesn’t make sense. But, it shouldn’t be hanging…

[kdlohry]

Well it doesn’t actually hang it just doesn’t do anything it doesn’t draw the traces or anything. It also doesn’t give me a DRC error. Let me fiddle it with a little more before I send it onto you guys for a bug report