4layer pcb, need via to connect 2nd layer only


#1

four layer board trying to get a plated through hole via to connect with the plane below the top copper cant select other than top bottom or all hen making footprint


Two filled planes on one copper layer? how?
#2

make a screenshot of your pcb and of the pad properties (inside pcb_new)
and tell us what net is assigned to the zone.

A through hole should always have “all copper layers” selected.


#3

It sounds like you are talking about a “blind” via which is not a “through” hole via, nor is it something you can add to a footprint.

You are aware that as soon as you add one blind via to a board the cost of the board increases significantly?


#4

I changed the title as the old one was a tad too long = less is more and also makes you think about your question more, so you try to explain yourself better


#5

In all my years of being involved with board design, blind vias were a last resort, used only when there absolutely necessary.

In the board rendering you show it seems there is a lot or room to add a through via, so I’m thinking your question is more of procedural issue you are having, if so please try to reword you question.


#6

Blind vias are a necessary evil for high density BGA designs and not much else. They will limit you to specialist PCB fabs, who will charge you a high premium price. Looking at that screen shot, I am surprised that you need for layers unless there is a lot on the reverse side.


#7

As above this is unclear.
If you mean start on top, and end on layer 2, NOT going all the way thru, that is a blind/buried via.
Select Via, and under Via type there is Blind/buried with Start/end layers.

Also as mentioned above, This will cost you more, so you have to really need it.

One example could be where the PCB directly faces onto a metal surface, but your PCB FAB may have lower cost solutions for that.


#8

The board has the bottom layer as a capacitive active electrode. The second to the bottom would be a shield layer and so would be around that bottom layer the top two layers are the adc and opamps.
So top two are routed and there is a part that is one plated through hole with no mask to bring the signal to layer 3 the shield or layer four for a solder mask covered capacitive active electrode.


#9

The board has the bottom layer as a capacitive active electrode. The second to the bottom would be a shield layer and so would be around that bottom layer the top two layers are the adc and opamps.
So top two are routed and there is a part that is one plated through hole with no mask to bring the signal to layer 3 the shield or layer four for a solder mask covered capacitive active electrode.


#10

As an alternative for “special needs” you could make 2 thin 0.8mm boards and solder them together.

Or use a “big” board for the “bottom” 2 layers and design a 2nd pcb with castellations you can solder on the othe board.

Edit:
A “via” to “2nd layer only” would not be a via.
But you can select which set of layers you wan to use while drawing traces with:
PCBnew -> Tools -> Layer Pairs

Some other settings for blind via’s:
PCBnew -> Design Rules -> Global Design Rules (tab) -> “Allow blind/buried vias”

But I haven’t drawn a blind via yet.
According to the link below it is apparently common to drill a hole into (not through) the pcb to make blind via’s and the process is “finicky but not very expensive”.
http://www.omnicircuitboards.com/vias

This seems to be a nice tutorial for a multi-layer pcb, including a 55min video, but I haven’t watched it yet:
https://www.engineersgarage.com/tutorials/multi-layer-pcb-design

Edit2:
In Chapter 9.2 of the PCBnew Reference manual I found the way for placing Blind / buried vias.
You simply start with drawing a track, then [RMB] and select “Place Blind/Buried Via” from the context menu.
Or shortcut [Shift + Alt +V]
http://docs.kicad-pcb.org/stable/en/pcbnew.html#_laying_out_tracks
But, as other’s have said before, this has a potential for making your boards more expensive, so you want to get an idea of what it cost to make such boards first.

[RMB] = Right Mouse Button.


#11

Since that electrode is quite large, I doubt a via or 2 that goes nowhere thru that, will even be noticed.
Then you can avoid blind vias…


#12

Covered vias tented vias with solder mask is ok the top two layers you can consider signal and 3 is driven shield and 4 is electode

The board has the bottom layer as a capacitive active electrode. The second to the bottom would be a shield layer and so would be around that bottom layer the top two layers are the adc and opamps.
So top two are routed and there is a part that is one plated through hole with no mask to bring the signal to layer 3 the shield or layer four for a solder mask covered capacitive active electrode.