Well, I dont know, I just want to know how to do it. Basically how to use the information regarding layer thickness capabilities that is in jlcpbc.com into KiCad, and try to get a thiner PCB. I imagine I will see the difference in price and decide/revert when I see the quote.
Im experimenting, and I want to know how is done. I might need it for a more complex board I have in mind.
My stackup is (all mm) copper 0.035 prepreg copper 0.175 core 1.065 copper 0.0175 prepreg 0.2 copper 0.035.
I don’t use JLCPCB, but when I order. 4-layer board, I just specify the final thickness, and let the board house worry about the inner layer thicknesses.
Unless you need controlled impedance, just leave it to them.
Btw, cheap prototype boards are app. 5 bucks premium. I use 4 layer as a standard whenever a processor sits on the board.
My figures are JLCPCB standard. Right now I see they changed to prepreg 0.2104 and inner copper 0.0152. Anyways…
But those number you provided before, where in the setup board do they go?
That’s my staple stackup
and that’s what they do:
AFAIK the stackup settings in KiCad have no effect whatsoever on the production. They use what they specify in their capabilities. Unless you want to pay a fortune for custom stackup.
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Awesome… This will be my starting point. I will make sure I talk to them before I place any order, just in case. Thanks a lot guys.
Just go to jlcpcb.com->Capabilities->Controlled Impedance Layer Setup and see. They have a choice of thickness for 4 layer boards from 0.8mm to 2.0mm finished thickness.
And no, I am no JLCPCB representative and I get no goodies from them 
. Just use them since years to my satisfaction. Hobbyist here.
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Maybe some background on multi-layer setup is interesting here. Usually multi-layer boards are not (much) thicker then single- or two-layer as only the total thickness is interesting for mechanic stability. therefore the board manufacturers use thinner dielectrics then on two-layer to get to the same width. the dielectric thickness is for the most designs not important so there is little to no risk in shrinking them notable exceptions are high voltage designs (shrinking layer distance decreases voltage rating) and RF-designs (a fixed layer distance is needed to get defined wire impedance).
I think KiCad ignores all of this when you select a different number of layers and always uses the default 1.51mm pregrep/core. So if you want a realistic stack-up in Kicad you always have to set it by yourself.
Maybe it would be an idea for a future Kicad version to give the board setup an idea of at least usable default layer stack-ups?
What for? Does KiCad do anything with the stackup?
First of all to avoid confusions for not so experienced users like in this case.
Then I think I remember there was an option (or plugin?) somewhere where you could include the layer stack-up into the the gerber files as tables for the board manufacturer to check.
And finally I think with the newest iterations of the gerber format it is even possible to include the layer information in a way board manufacturer tools can pick them up directly from the files. So even f this is not implemented now this should be something KiCad should at least consider to keep up with the tools in the manufacturing world.
In addition to that, if you set the layer count to larger numbers like 8 or 16 without adjusting the stack sizes, the 3D view looks ridiculous. I agree that KiCad should probably try to set sensible defaults upon changing the layer count, maybe by trying to keep the board thickness constant or by otherwise choosing sensible defaults.
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…and more realistic stackup like prepreg-core-prepreg for 4 layer boards and not core-prepreg-core.
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Upvoted, a good idea
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