Sorry about the title - trying to think of how to describe.
{Edit: ahh, maybe “board to board connectors”?}
I’ve made a simple 2732-to-2764 adaptor board. We have a 24-pin EPROM socket that I want to install a 28-pin 2764 EPROM.
The PCB is fine but just want the 3D view to be correct. At the moment it shows a physical chip (highlighted green) for the 2732 - I’m using the footprint “Package_DIP:DIP-24_W15.24mm”
What it should actually look like is a pair of 12-pin headers separated by 15.24mm so that the board can plug into an existing socket, with a 28-pin socket on top (correctly shown).
Happy to have a crack at designing it myself but I’m assuming that this sort of model already exists as it’s not a new requirement … just having a little difficulty thinking of what it would be called, etc.
Thanks,
/Brett.
.
Ahh, yes, something like this - so not in the standard Kicad library?
(module DIP-24_W15.24mm-Notch (layer F.Cu) (tedit 5CD0B268)
(descr "24-lead dip package, row spacing 15.24 mm (600 mils)")
(tags "dil dip 2.54 600")
(fp_text reference U1 (at 7.62 5.08) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 2364 (at 0 -3.72) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.05 -2.45) (end -1.05 30.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 16.3 -2.45) (end 16.3 30.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 -2.45) (end 16.3 -2.45) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.05 30.4) (end 16.3 30.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 14.351 -1.016) (end 16.129 -1.016) (layer B.SilkS) (width 0.15))
(fp_line (start 16.129 -1.016) (end 16.129 28.956) (layer B.SilkS) (width 0.15))
(fp_line (start 16.129 28.956) (end 14.351 28.956) (layer B.SilkS) (width 0.15))
(fp_line (start 14.351 28.956) (end 14.351 -1.016) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 -1.016) (end 0.889 -1.016) (layer B.SilkS) (width 0.15))
(fp_line (start 0.889 -1.016) (end 0.889 28.956) (layer B.SilkS) (width 0.15))
(fp_line (start 0.889 28.956) (end -0.889 28.956) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 28.956) (end -0.889 -1.016) (layer B.SilkS) (width 0.15))
(pad 1 thru_hole oval (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at 0 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at 0 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 0 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at 0 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 15.24 27.94) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 14 thru_hole oval (at 15.24 25.4) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 15 thru_hole oval (at 15.24 22.86) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 16 thru_hole oval (at 15.24 20.32) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 17 thru_hole oval (at 15.24 17.78) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 18 thru_hole oval (at 15.24 15.24) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 19 thru_hole oval (at 15.24 12.7) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 20 thru_hole oval (at 15.24 10.16) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 21 thru_hole oval (at 15.24 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 22 thru_hole oval (at 15.24 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 23 thru_hole oval (at 15.24 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(pad 24 thru_hole oval (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x12_P2.54mm_Vertical.step
(offset (xyz 0 0 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 180 0))
)
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x12_P2.54mm_Vertical.step
(offset (xyz 15.24 0 -2))
(scale (xyz 1 1 1))
(rotate (xyz 0 -180 0))
)
)
Don’t you simply just need two rows of pin headers ?
Those pin headers are not suitable for plugging into DIP sockets though, they are too fat and won’t fit into precision pin sockets, or will damage wiper sockets. Unless the DIP socket has been replaced by two rows of pin sockets. So another type of pin array is needed for the 3D rendering.
Yep - just not sure how to assign two separate things (two sets of headers) as a single footprint. I was hoping that this sort might be in the standard library, but maybe not.
For the actual build, I would be using this type, with the top pin trimmed off after soldering in.
But for the 3D image, those standard pin headers are good-enough for me to just show what it should look like.
Just assign 2 rows of pins as the 3D models (you can have more than one model per footprint) to the DIP footprint, one offset from the other by 15.24 mm.
1 Like
Ahhhh, okay thanks. I’ll give that a try!
I’m confused about what you want… Headers, Pins, Sockets…
24pin chip into 28pin Socket?
28pin chip into 24pin Socket?
Two 12pin EPROM chips into 24pin Socket?
Screenshots below shows above combinations…etc.
Square/Rectangle Pin in Round-Hole:
• Do they fit and do folks do that and does it work - Yes! But…
• Generally, Chips don’t have Round-Pins, they have Flat/Square Pins.
• Sockets for Flat/Square Pins have internal Leaf-Spring that presses on the flat surfaces (two surfaces) of the Pin.
• Sockets for Round-Pins provides Cylindrical surface contact. If putting a Flat/Square Pin into it, they will work BUT, reliability is not guaranteed as only the Corner edges contact the socket’s surface.
Vibrations, Thermal Expansions/Contractions can cause inconsistent contact. Fretting from vibration is a well-known failure ( I was a Connector designer) and should be easy to imagine those four edges having indigestion that will cause hiccups
Real Hardware
Square-Peg In Round-Hole… as the saying goes
Four corner-edges Vs. Two Full-Contact sockets (green = Leaf-Spring contact)
The 2732 EPROM has 24 pins. This can store 4KBytes.
The 2764 EPROM has 28 pins. This can store two banks of 4KBytes.
I want to install a 2764 EPROM (with two different banks of BIOS, switching via A12) in place of the original 24-pin EPROM, which has a 24-pin socket on the board.
To do this, I made a 2732-to-2764 daughterboard (refer images).
The 3D representation (refer images), at the moment, is incorrect as it shows a (highlighted green) 24-pin chip. Obviously this should be two rows of 12 pins.
The original question was: does this sort of 3D representation already exist, or do I need to create it? I don’t mind creating it but if it already existed then I wouldn’t need to.
I don’t really care about what the 3D representation of two rows of 12 pins looks like … I just don’t want it looking like a 24-pin chip as it currently does.
To avoid my spinning my wheels and digging a hole, Best if you Post a Sketch (hand drawn/other) of what you want it to look like. You say you
But, you may not like how I do it…
As I said above . . . edit the footprint, go into the 3D settings, hide the current 3D CAD and add two rows of headers.
took me 5 mins . . .
After RaptorUK’s post I had to know for sure, so I took a random footprint, and added three instances of some existing “pinsocket” 3D model to it and made them all visible. and this works. They all show up both in the preview, and in the 3D view of the PCB.
With the Scale, Rotation and Offset you can adjust those paramaters of the 3D models relative to the footprint itself. I used offsets of 3, 6 and 9mm
I have not timed it, but 5 minutes (inclusive writing this post) sounds about plausible.
Yep, thanks. Am going to give it a try - PCBs are fabbed and on their way.
1 Like
Looks like you need to change your username 
not so clueless any longer.
2 Likes
with all the added inductance i’d rather place bypass on the top board, but if the speed is not very high maybe doesn’t matter much…
