Zone inside zone - both "no net"

I have a QFN footprint “breakout” with a central thermal pad. I’m copying that pad to the bottom layer too, so that the vias will transfer heat from the top pad (under the chip) to the bottom pad.

I’d also like to add a lot of “no net” copper to the bottom, simply to avoid an excess of etching requirement. However, I do not think it makes sense to have the entire bottom layer connected to the ‘thermal’.

That means the bottom side needs two concentric copper zones, both on the same “no net” net.

I have tried priorites (higher inside) and (zone, keepout, zone) <–> (outer, space, inner) without success. I think that if the zones had different nets it would be easier, but this is not the case here.

In general having non-connected copper areas isn’t recommended. You could consider having GND zones in top and bottom and stitching them with vias. If you don’t have strict space requirements, it’s often pretty easy to move tracks so that the GND areas can “jump” from one side to the other with vias, covering the whole board.

Have you already read How to create a power plane (using zones), could it help?

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OK - Thanks - I have had a look at that now.

“Planes only fill if they have a connection to a pad of the correct net in some way.”
This is normally true - but I find for “no net” this requirement is (reasonably) dropped.

I looked at “Zones with the same net”. I note
(a) “behavior seems to be a bit unpredictable here in version 5.1.4”
(b) “Zones with different priorities are kept separate, but as of 5.1.4 the result when filling may be something you don’t want.”

I wonder what the logic is when I use concentric “no net” zones, along with inner = highest priority?

  • For 2 “fills”, both get filled, and of course no gap.
  • For a central “keep out”, the inner zone stays unfilled.

I think I have to make a new footprint “QFN-25” where the thermal pad is ‘#25’ and then try again.


The answer seems to be

I agree with @eelik the “no net” is almost a left over from 1970s and 1980s design when it was common to fill unused area to save etching and a misguided idea that it reduced noise… Getting a proper ground plane is almost always a good idea.


Well, because this is a breakout, I do not know what pin(s) will be ground - any chip might be used.

Often datasheets specify that the thermal pads should be connected to GND.

For a universal breakout board I would probably create a net with a few SMD pads for these. The SMD pads then will have bare copper so this makes it easier to solder some wires to it to wherever your GND will be on your particular chip.

Also: A thermal pad can not do it’s work if it is restricted to only under your QFN. It needs surface area exposed to air to dissipate heat.

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I think another way to put what has been said: By placing a few jumpers (which may be populated as desired) you can create a net which would usually be grounded through one of the jumpers, but could alternatively be connected elsewhere. I am trying to recall whether I have seen any ICs with which the belly pad is NOT supposed to be grounded. Grounding the belly pad is the usual rule. Subjectively, thermal vias and a ground plane area seem to cool better than I expect.

Switching regulators often have a thermal pad that is meant to connect to GND in a controlled way to reduce noise, a net tie in KiCad

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