Hello, i am sure i am doing something wrong. When annotating a schematic i have cleared all the annotation so no previous annotation is messing things up. the annotation is assigning each gate its own number rather than combining into a single package. for example, four NAND gates next to each other start out as all U?A just like the example in the documentation. After annotation, they will become U6A, U7A, U8A, U9A rather than U6A, U6B, U6C, U6D. I am just using 74LSxx gates that came in the kiCAD library. So looking at those, they have the hidden power/ground so the box is checked that says all gates are not interchangable. so is that preventing annotation from properly filling devices with gates? if so, why in the world would it do hidden power/ground? If that is not what is causing the problem, then i have no idea.
Isn’t that just manually assigning the gates to a package. Eeschema doc section 8.2.1 clearly describes that the annotation will automatically assign the gates until the package is full and then start assigning to the next gate. am i reading the documentation wrong?
Depends on how the symbol is made. If it has different units (at least one unit differs from the rest) then the automatism must be fully disabled (because kicad right now does not support only partial exchangeability, this will come with version 6.)
Which generally means that this feature does not work with symbols that are KLC compliant, as they have the power supply unit which is different than the other units. (The tradeoff is worth it. Believe me we looked into this for quite a while)
Yes, thanks, i suspected that it was a problem how the symbol was made. is there an example in the standard kiCAD library of simple 74xx gates that will properly fill up a package like in the documentation example (8.2.1)? Perhaps i just picked an obscure library? but it is just the ones that installed with kiCAD.
…or…
do i just manually assign to keep the KLC library and wait for v6 release?
I would argue that the documentation is the wrong thing here. Really this feature is not as helpful as you think it is! (There is a very high likelihood that you will overwrite the automatic decision later in the design process.)
The downside of allowing this feature to be used is that one must rely on invisible power input pins that automatically connect to a specific power label. This is both unintuitive and inflexible as it does not support having multiple power supply lines in the same design.
But yes sadly there are still libraries that have not yet been converted. The 74xx_IEEE version is just one example.
These little tutorials are great, but this did not come up in my searching so thanks for pointing it out.
For analog hidden power pins could indeed become a nightmare. However for digital not so much. In my professional life I used the historical commercially available software but now looking at KiCAD for my personal. Things like assignment to packages are handy.
KiCAD has become so professional it is easy to forget that it is not, in fact, a commercial product.
I think nowadays when ferrite beads are cheap and EMC is important it is a good practice to connect digital ICs to VCC by ferrite bead. I don’t accept hidden pins even for digital ICs.
I’m not sure if understand you well.
Those times I was not interested in KiCad but I suppose that beginning solution was to use DeMorgan symbol to connect power to one of NAND gates and have a advantage of automatic assigning gates during annotation. Changing the gate number (A,B,C, or D) was no problem. And you need not to “rely on invisible power input pins”.
Then the decision was made to use separate symbol for power supply and it blocked that automatic gate assigning. So, as I understand you, the next decision was made - to make it once more working in V6.
I don’t see the big advantage of having the separate symbol for power as when connecting power to IC I like to see what it is doing to decide to use or not the power filters in its supply. Seeing it together with circuits more help me than disturb.
No matter how you do it, if you want the automatism then all units placed must be equal. KiCad can combine any placed unit as it wants if now one unit has power pins (via your demorgan stuff) then it might happen that one device gets that unit twice while another one gets no such unit.
And that assumes that the netlist generation works if the de morgan and non demorgan have different pins. (I would not be so sure about that)
The only alternative to hidden pins was having the pins visible on all units. But same problem as above: kicad is free to choose which placed units are compined which might result in one of them having the power pins supplied multiple times while others never get them supplied.
You are right. I didn’t thought about it.
Since I use computer to draw schematic I have never had more the same type gates at schematic than one IC (previously it happened) so newer felt into that.
This also used to be my preferred way of doing it. But with dual or quad opamps this approach had several drawbacks:
all placed units obviously have to have power pins connected. This can lead to shorts between different power rails (e.g. 3.3V and 5V) if the designer uses unit from the same package in different part of schematics or even different sheet. ERC will catch this.
If you mirror the unit across X axis, the connected power pins are reversed (GND on top and +VCC on bottom). This looks silly to me. And can lead to errors if the designer just mirrors the unit and connects the power as usual. ERC will catch this.
Where do you place decoupling capacitors. I usually placed them near the units, but sometimes it was not apparent for which device the capacitor was intended and I had to place additional note beside it.
So with migration to KiCad and its library I started to see the benefits of having the power pins in the separate unit as you get rid of all of the above mentioned issues.
It is way ‘since always’ I think there should be at least 2 DeMorgans and not only one.
I am rather not using analog ICs. For microcontrollers having the VCC/GND pairs at each side my first attempt (20 years ago) was to have two pairs at bottom of symbol and two at top and put capacitor for each pair just between them to unambiguously show which C is at which pair. Few years later I changed my mind and now I have all VCC pins at top and all GND at bottom and I typically put 2 capacitors to left to GND symbol and two to right to another GND symbol.
You guys can make your personal libs however you want them. The official lib will use separate units for power supply and possibly another separate one for common control interfaces.