Why do my inverted connectors resize?

Maybe one day someone can write software to transform one representation to another automatically. In the meantime I’m glad it’s your job and not mine.

I fear there is no such “magical” solution that will reconcile one individual opinion with another individual opinion. Nor is it my “job” (luckily).

They are equivalent representations because they result in the same board. Not having to put things in boxes is the less constrained version. The history of data processing is that it’s easier to translate from a less constrained representation to a more constrained one. We once had to put line numbers in column 1-5, continuation indication in column 6, statement in columns 7-72, and a comment in columns 73-80 on punch cards. Now it’s free form (except for Python), and IDEs help the programmer. The CPU has always required strict binary layout of course.

So the future is to push such work to machines and let the designers lay out the schematic the way that explains the function best. We can leave it for the machines to cross the eyes and dot the tees. :wink:

In my neck of the woods (Australia), before metrication, machinists always talked in “thou’s”.
Mils were almost the exclusive domain of electronics.

Agree!!!
I have only ever seen a couple of schematics (in my entire working life) drawn this way and they were a true abomination. The spaghetti jungles created by the wires were utterly impossible to decipher.

The other major problem, especially with gates, is it is unknown which gates go where when originally drawing a schematic. It isn’t 'till after the PCB is mostly laid out that the schematic can be finalised.
With individual gates it is a simple process to relocate in the schematic, but as one box, there can be major relocation of wiring and then the nets need changing and all up there is a much larger margin for error.

Now that you made me think more about it. I recall measurements were in “thousandths”. So something might be 5 thousandths. However I had heard “thou” used when describing an action i.e. please take off another 5 thou.

And the goal of a schematic is to document a design. I’ve seen many schematics in my career and they + BOM + PCB should fully document a design.

I agree 90%, maybe 100% if you consider the everything or perhaps nearly everything " IC boxes then connect everything with labels"

That said, on multi board projects with connectors between the boards I prefer to make the board connector match the physical connector (if possible). It makes troubleshooting and going from one board to another much easier.

A goal of any schematic is to be logical and easy to read. My processor symbols do not have pins laid out like the footprint.

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The IEC does not constrain you like that. If you really want to “see” the inside of a component there are options:

  1. The box is not constrained to a certain size, so for simple IC’s you could draw them inside.
  2. The pins do not have to be laid out in their physical order.
  3. You could add a drawing of the inside of the IC (or in KiCad you could do it as an hierarchical sheet).
    And again, if one doesn’t do any major work in the industry one can do whatever. My point was simply based on what was said about KiCad being aimed at professionals.

but I think the other point here is that many professional schematics don’t follow the “standards”. A standard is worthless if only a few use it and at this point there is no need in enforcing it. As far as I remember Altium as well as Eagle also use Mil as base unit and I hope no one sees the former as a hobby product.

Perhaps I’m biased because I only ever worked for engineering firms who had to conform to standards. We never hired sub-contractors who did not or could not work according to spec. nor did we use software that couldn’t. But then again, we only worked for big international companies (think refineries, chemical plants, industrial machine factories, plane manufactorers, etc.) so perhaps my view is coloured because of that.

Can you share with which PCB/schematic CAD programs you worked there? It always helps to look how other programs solved some issues already instead of start the whole process on how to implement things again from zero.

It depends on the client. AutoCAD is the “default” for drawings. It is an exception if a client uses anything but that. Mind you, the transition from pre-computer age to digitalisation was a bumpy one as there was no standard for that at first, so everyone was reinventing the wheel in the 90’s. This leaves us still with difficult te maintain and service projects.
PCBs were not “digitized” yet when I was till working, we made them by hand at first and later we experimented with AutoCad and Inventor. I’m still in contact with old collegues and PCBs are a bit of a bottleneck right now. Going from manual drawing to pcb-software cuts the development time, but it also increases the time spent on document-management and control. More often than not, mistakes are made because of this. Altium and Eagle are the most used. I think Eagle more so because it is AutoDesk so clients tend to think they integrate better (which they don’t).
My old employer has written in-house software to read dxf files into eagle by standardizing blocks in autocad used for components that contain metadata about type and footprints. Schematics drawn in pcb-software is never considered “approved”, “issued” or “as-built” and seen as a waste-product/sketch. The pcb-layout and any possible test-pcb is always checked against the “approved” circuit diagram (drawn in AutoCad).
So right now, people are still re-inventing the wheel when it comes to pcb’s; looking for a good, workable and efficiënt solution.

fwiw I don’t think KiCad does a worse job in this regard than any other software. For a free program it competes very nicely with paid software in regards to features and workability. Perhaps the way the symbol-library and footprints are organised could do with some improvement. But other than that I personally would choose KiCad over expensive solutions at this stage since none cater to industrial standard workflow. I haven’t looked at the API yet (python?) so I’m not sure it could handle in-house solutions.

I work with schematics and layouts made with AutoCad more than fifteen years ago.

There is no correspondance between schematic and layout. I mean, the layout is a drawing made by a real genious (I met him, nowadays is retired): no ratsnest, no ERC (only visual). No Gerber generation, only dfx or dwg. Gerbers were made with another tool that could read dwg.
AutoCad is not(or was not) a tool to design pcbs.

No, indeed it isn’t. That was/is the problem. But you can assign (hiddden) metadata in a dwg or dxf file and read that from another application or have another application write to it. So there is a mechanism that allows a program to communicate two-way to a dwg or dxf. The problem is, that no-one implements it in a way that is workable from an engineering point of view.

There always comes the first time :slight_smile:
I was writing about the idea of collecting gates, buffers at schematic together (as they are physically in one IC) being stupid. I didn’t said any person or organisation being stupid.
If you draw simple schematic consisting of some gates (like synchronized gate in frequency counter) using separate symbols it is clear at once what the circuit is intended to do and how it works. If you then draw it with all gates replaced by IC rectangle (even with gates symbols inside) then understanding the circuit is much harder but still possible. But if you have little more complicated schematic than even using separate gates it can be hard to understand. If you then replace them with IC shape symbols understanding can became not possible (at least for me).
I didn’t answered in this thread as it took me some time to find magazine from 1984 to scan the schematic I wanted to show as an example of little more complicated.


It is the time base trigger generator from the oscilloscope that I built when I was a student.
Try to understand it. Ct and Ch are switched when you switch the time base. At one end Ct were in pF at the other I had to use electrolytic capacitors.
What for is PR1 flip-flop and E gate? What for is K gate? What for is H gate?
It is not so easy even for me who understood it perfectly 40 years ago (I constructed my oscilloscope in 1982).
And now try to imagine that PR1 and PR2 are placed together as one 14 pin DIP, NAND gates are grouped in 3 14 pin DIPs and all it is connected with wires. I expect a huge mess on the schematic.
If someone has nothing to do he can define those 2 symbols and try to write this schematic as clear as possible.
Schematic with single gates symbols has all the same information as schematic with gates, buffers grouped in DIP like symbols, but are much, much easier to understand. So what wrong someone sees in using single gate symbols. For me the idea of grouping them together at schematic is stupid. If we want schematic to be hard to read than what for a graphic representation of schematic at all. Let say the ASCII text file is enough as has all the same information and is also hard to read - the same effect reached.

The problem with standards is that they frequently end up among stupid people.
We just got into such a problem.
Imagine a central (round) room with radially arranged airlocks. Each airlock has a door on the outside, a door to this central room, a door to the airlock on the right, and a door to the airlock on the left.
To serve such a complicated situation we had to define a controller for 16 doors. If each door has a RFID reader at both sides than we have 32 readers. To drive all these doors, to read signals from them we have to use some extension devices. All of it at RS485. I wrote it only to explain why as lot as up to 50 devices on a bus. There are signals that have to be transmitted fast - like tamper detection of removal from mounting. Device should send that information before the attacker has time to cut the cable in which case we only get the information that device not responds what is easy interpreted by human as an failure, not attack. We organised communication that way that anyone who has something to say just says. The risk of the frames colliding is very, very small. When one starts transmitting within a few us, everyone knows the line is busy. The repetitions with random delays solve the problem of the constant collision of frames from the same two devices. We use this system since about 1995. At our RS485 normally is rather quiet.
And now we got the info that some big ordering party included the requirements of the IEC 60839-11-5: 2020. 2 weeks ago we bought that standard. It says:

  • only controller may spontaneously send a message,
  • devices shell reply within 200ms (typically should be less than 3ms).

So the only way of working is to pool each device after each. Lot of bus time is lost as device had to check the cryptographic signature, decrypt the message then encrypt the answer and sign it while bus is idle as controller waits for its answer.
To not loose time they assume polling as not crypted. But not crypted communication is allowed in grade 3 (IEC 60839-11-1) only if the wires are mechanically protected against access. Laying them in plastic tray I would not consider being seriously protected. Do polling is communication or not? Not crypted pooling can be easily cheated and standard requires not responding device is reported in 5s - so we need crypted pooling.
And now imagine that one has an urgent information and have to wait until all were asked if they have something and each of them answers ‘I have nothing’. And each of them should typically answer in 3ms but is allowed to do it after 200ms. Standards are good - they allow to combine devices from several sources together. But who guarantees that someone will not connect 32 readers that answer within 200ms each.

Which is the reason why major industry only work with those that use and understand standards professionally. I had to deal with draftingfirms that just started out whom you could classify as “stupid”. They never lasted long.

Regarding your other post with the example drawing: what you describe is about analyzing snd learning. That is not the primary function of a drawing. Like I said: every project exists in a context. A drawing is always accompanied by calculations, a manual, sketches, measurements, testresults, datasheets, etc. Etc. You can never get the whole picture or understanding from looking at just a drawing.
The drawing is nothing more than a symbolic representation of something that either exists or needs to exist. Its an instructionset on how to make or repair something. And while you can use it to learn how it works, that is not its intended use. There are other tools for that.

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Ex SIEMENS here. I’m completely with you…

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I would rather say: ‘to understand’ how it works. Employees change and in my opinion schematic should be drawn in such a way that it is easier for the newcomer to understand how the device works.
As I know absolutely no information is lost if schematic uses symbols for single gates and buffers.
May be I’m wrong. Can you say what is lost when single gates symbols are at schematic?
Those single gate symbols certainly come also from some standard.
I suppose you’ll never convince me that schematic that combines individual gates into a single symbol is better in any way. And I understand that this is my problem :slight_smile:

That is exactly the reason we have standards. And if the newcomer is incapable of reading a standard drawing they are probably still learning at which point they need a teacher/coach/mentor who will teach them.
I am not trying to convince you of anything. I am just explaining how it works in the industry.

What is lost in a schematic where you use single gates instead of an IC, is overview, simplicity and readability. An IC tells you what its function is and it tells you what signals go in and come out (pin labels + datasheet). I don’t care what goes on inside, all I need to know is its function and its connections. That way I can ascertain quickly what it does, what part it plays in the whole and if it is or is not to blame for any failure.
If I draw out every IC in their individual parts, I get huge spaghetti. Some IC’s contain 100’s if not 1000’s of individual components. Where does one IC start and another end? Besides, the information is useless to me. If an IC is broken I need to replace it whole, not repair it.
Common ICs are well known by those that work with them, so most know what it does anyway. And if you have a custom chip it is usually very complex.