Vias in Gerber File

I am about to get my first PCB manufactured, and I noticed when looking at my gerber file that my via holes aren’t showing up in the top and bottom soler masks. They just look like ordinary holes. I want them to be conductive so I can utilize the bottom of the board. Below is an image of how my vias look on my PCB. Is there something I must do to make them conductive?

They are conductive. The mask layer doesn’t have anything to do it. The holes of vias are copper plated – that’s the whole purpose of a via after all, to let a track go through to the other side. In practice the mask may go to the hole and cover it, but it doesn’t have any effect to conductivity. See How does solder mask layer work? if the purpose of the mask layer is unclear.

Thank you! That makes sense, but is the preview the manufacture gives me supposed to look like this? It seems odd. I just want to make sure that I don’t mess this up. vias_gerber

I would expect a copper ring around the holes like the through hole components.

From that image it’s impossible to say anything. We don’t know at all what it is (not from KiCad), so we can’t interpret it.

You can look at the PCB in KiCad’s 3D viewer, and if you then turn off the visilbility of the PCB base material and solder mask, you can look into the PCB and see your via’s.

If you want to see what ends up in copper, then generate a set of gerber files and view them in gerbview.

If I understand you correctly you don’t want the vias covered in solder mask, If you select ‘do not tent vias’ in the plot gerber window I think this will give you what you want.

Through hole components you need to solder so you need copper not covered by mask. But vias you don’t need to solder so copper near via holes can be covered by mask.

wparquet refers to a copper ring, not a mask ring. And indeed, one expects a copper ring around a via hole.
And indeed also, you can leave the via covered with mask. You want the pads protected as any copper that is not component lands, fiducials, dadada. The fabricator will create a small hole on one side to allow for outgassing.

wparquet is indeed mixing several things with each other. Sometimes talink about the mask and others about copper.

SMT pads are drawn in the color of the layer they are on, but THT pads are always drawn in yellow.
In a similar way, the grey ring of the via’s is also copper.

There are a few ways to get a better Idea of what is on each layer.
Generating a set of gerber files is always the best reference, because that is what is normally sent to a fab to be manufactured, but it takes a few mouse clicks to make and view such a set of files.

With [Alt +_3] you open the 3D viewer from within Pcbnew, and with these settings 3D viewer / Preferences / Display Options:
(Turning off “Show board body” and “Show solder mask layers”) you can look through the PCB and see all via’s clearly on the PCB.
In the screenshot below the mouse cursor is on a via.
(There are 3 via’s, the rest are THT holes)

In what I cited yes. But he began with:

The plated through holes are plated before etching away any copper because they need a power connection for electroplating. Masks are done after so they have no effect.

OK. I understand now.

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