Hey there all, I’ve got a battery voltage (nominal 3V, 2330 coin cell, < 10uA current draw) that I need to route from a battery holder to an RTC. As I routed it, I remembered back to my intern days where I had preset 3 different via and track widths and sizes with the appropriate annular rings. A search of the great Googs didn’t give me much in the way of useful info. If I was going to create a trio of presets (so I can quickly switch between them if I don’t have a Net Class assigned), are there any standard via and track sizes you all like to use for power traces, especially when it comes to routing power over distance?
Is the right answer to do some calculation here? I know that a 30 mil trace will get the job done (with plenty of margin lol), but I’m not sure about via sizing for that. I thought perhaps like a 24mil via hole and then I blanked on the method for determining and calculating annular ring size. I know the minimum is .15mm but that doesn’t tell me the recommended calculation.
I am a power electronics designer and I agree. But let’s flip the question on its head for a moment: If you have ample room for 30 mil traces and maybe 40 mil OD vias, what is the advantage in making these smaller? I like to put 0603 chips on small-ish 0805 footprints, and I usually connect them with 40 mil tracks. If I need to squeeze the tracks for space or connect to a fine pitch IC I make the tracks narrower as needed. The finest tracks do not offer as much mechanical robustness (corrosion, over-etching, or a slip of the soldering iron) as you get if you make them wider.
Yeah you have a point. It was a bad example. I guess my question is more general and is more about what standard trace sizes for say up to 500mA on low voltage lines and what’s a good annular ring size for a via on a larger power delivery trace. I’m not sure what good rules of thumb are.
If you need to move a lot of current from one side of a PCB to the other, a single via isn’t going to cut it, regardless of the annular ring size. When I need to do this, I use a really fat trace and then place multiple vias in it.
There are trace width calculators all over the internet, so use one to determine the trace width based on the copper thickness and current, and then place your vias. I haven’t seen a via calculator, but I always design such that a single via only carries an amp or so.
For lowish currents, almost always the thinnest and smallest tracks and vias that your manufacturer can make reliably is plenty plus good. According to KiCad’s own calculator (from the project manager) 500mA though a 0.12mm wide track gives a temperature rise of 10 degrees centigrade and with a length of 100mm this has a resistance of 400mOhm and a 200mV voltage drop.
Same for via’s. Often, around 0.3mm is the smallest cheap via. Smaller vias are more difficult to manufacture and are often more expensive. And if .12mm wide track is good enough for 500mA, then a .3 mm via can also easily handle that.
It’s only for high current tracks that width, copper thickness and via’s become an issue. And it can become a very mayor issue. Think about for example a High end PC processor with a TPD of 225W and a core voltage of around 1V (Yes, that’s 200A tough a PCB, and you can hardly tolerate extra voltage drop! Or a 50kW motor controller, for example for electric cars or industrial VFD’s.
I think you have several “boundaries” to work with.
Is the current being handled. Not just looking at temperature rise but also against voltage drop. So if you had a 1V voltage regulator (I have been working on one that produces 0.85V) you really want to minimize I*R voltage drops, regardless of temperature rise.
Is the limitations of the pcb fabricator. You have a minimum trace width based upon the fabricator and copper thickness. My idea is to not hit this boundary unless you have some compelling reason to do so, such as being squeezed for space.
Is the dimensions of the pads you are interconnecting. Usually it is not so convenient to use an 80 mil track to connect to an 0603 chip. Probably you want to limit the track to 25 or 30 mils where it connects to the 0603 pad. But this is not a firm rule and exceptions are possible.
Is the available pcb space, which may constrain your features from being too large.
And as has been mentioned, there is cost. Use via sizes that are less expensive rather than more expensive.
Within these boundaries; I prefer to use larger track width. The fabricator does not give you money back for etched copper. Most circuitry will not be adversely affected by wider tracks (within the boundaries I have recommended.) At the low voltages we use most often, wider tracks reduce inductance slightly and that is often helpful. If your circuit is switching 100V in 20 nSec you might find that track capacitance is a problem and that might favor narrower tracks. But in my opinion, this is not a common situation.
I think for me, my mind went to this train of thought: If I have a wider track, I get lower impedance. Since it’s an RTC, what’s a reasonable “large” size for low current, low-impedance connections?
I think your suggestion for a 40mil OD is what I will roll with.
Thanks for your input again! I think for now I’m going to stick with the widest tracks that fit my available space. I’ll double-check with a quick temp-rise and voltage drop calculation and run with it from there.
This can make it hard to solder when you solder by hand. I would stay away from tracks > 500 µm when you don’t need it. This is especially problematic for nets that have a power plane. Because width tracks carry the heat away.
Also, please use metric units whenever you can. It makes working a lot simpler and it is a lot more professional than using a unit that was defined by the length of 3 barley corns.
For all signals I use 0.25mm tracks (in some places (0.4mm raster IC) I have to use 0.2mm.
Power for RTC is for me signal not power.
For VCC I generally use 1mm tracks, but my circuits not consume more than 200mA.
About vias at power lines I can’t say a lot. My designs are 2 layer with whole bottom being GND fill so I have only GND vias. Recently I reduced their annular rings and now I use 0.8/0.4, 0.9/0.5 and 1/0.6 vias.
Why?
I just showed you that even very thin tracks are OK for currents up to a few hundred mA. Thinner tracks are also usually better for (digital) signals, because they have a lower capacitance.
Of course there is controlled impedance (which I have never worked with and which I think we are not discussing.) But at the low voltages we are generally discussing, track inductance is MUCH more likely to be an issue than capacitance is.
This is kind of a severe example but in a power converter I can remember once seeing about 9V difference in peak voltage across perhaps 2 cm length of wire. This was all caused by L*dI/dt (inductance multiplied by rate of change of current.)
I cannot imagine having difficulty soldering a 1 mm track with my soldering iron. This will depend upon what tip you are using on your iron, but it does not require a very large one to solder 1 mm tracks with a tip temperature of maybe 350 degrees C.
I will not defend it too much, but in USA it seems that decimal inches are used frequently. Most of us here have learned to use mm and inches interchangeably. Perhaps this was all because (I think) the first ICs were made in the USA with packages such as DIP with 0.1" lead pitch. Now our cars have tires with sizes that combine mm and inches. Have not yet seen barleycorns.
